Lines Matching defs:op

25 		cs_arm64_op *op = &(arm64->operands[i]);
26 switch(op->type) {
30 printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg));
33 printf("\t\toperands[%u].type: IMM = 0x%" PRIx64 "\n", i, op->imm);
40 printf("\t\toperands[%u].type: FP = %f\n", i, op->fp);
45 if (op->mem.base != ARM64_REG_INVALID)
46 printf("\t\t\toperands[%u].mem.base: REG = %s\n", i, cs_reg_name(handle, op->mem.base));
47 if (op->mem.index != ARM64_REG_INVALID)
48 printf("\t\t\toperands[%u].mem.index: REG = %s\n", i, cs_reg_name(handle, op->mem.index));
49 if (op->mem.disp != 0)
50 printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, op->mem.disp);
54 printf("\t\toperands[%u].type: C-IMM = %u\n", i, (int)op->imm);
57 printf("\t\toperands[%u].type: REG_MRS = 0x%x\n", i, op->reg);
60 printf("\t\toperands[%u].type: REG_MSR = 0x%x\n", i, op->reg);
63 printf("\t\toperands[%u].type: PSTATE = 0x%x\n", i, op->pstate);
66 printf("\t\toperands[%u].type: SYS = 0x%x\n", i, op->sys);
69 printf("\t\toperands[%u].type: PREFETCH = 0x%x\n", i, op->prefetch);
72 printf("\t\toperands[%u].type: BARRIER = 0x%x\n", i, op->barrier);
76 if (op->shift.type != ARM64_SFT_INVALID &&
77 op->shift.value)
79 op->shift.type, op->shift.value);
81 if (op->ext != ARM64_EXT_INVALID)
82 printf("\t\t\tExt: %u\n", op->ext);
84 if (op->vas != ARM64_VAS_INVALID)
85 printf("\t\t\tVector Arrangement Specifier: 0x%x\n", op->vas);
87 if (op->vess != ARM64_VESS_INVALID)
88 printf("\t\t\tVector Element Size Specifier: %u\n", op->vess);
90 if (op->vector_index != -1)
91 printf("\t\t\tVector Index: %u\n", op->vector_index);