Cross Reference: /external/llvm/lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp

Lines Matching refs:IsWrite
211                                          bool IsWrite,
215                                          bool IsWrite,
222   void InstrumentMemOperand(X86Operand &Op, unsigned AccessSize, bool IsWrite,
280     X86Operand &Op, unsigned AccessSize, bool IsWrite,
287     InstrumentMemOperandSmall(Op, AccessSize, IsWrite, RegCtx, Ctx, Out);
289     InstrumentMemOperandLarge(Op, AccessSize, IsWrite, RegCtx, Ctx, Out);
313     InstrumentMemOperand(*Op, AccessSize, false /* IsWrite */, RegCtx, Ctx,
323     InstrumentMemOperand(*Op, AccessSize, false /* IsWrite */, RegCtx, Ctx,
332     InstrumentMemOperand(*Op, AccessSize, true /* IsWrite */, RegCtx, Ctx, Out);
341     InstrumentMemOperand(*Op, AccessSize, true /* IsWrite */, RegCtx, Ctx, Out);
412   const bool IsWrite = MII.get(Inst.getOpcode()).mayStore();
425       InstrumentMemOperand(MemOp, AccessSize, IsWrite, RegCtx, Ctx, Out);
582                                  bool IsWrite,
587                                  bool IsWrite,
595   void EmitCallAsanReport(unsigned AccessSize, bool IsWrite, MCContext &Ctx,
608                                             (IsWrite ? "store" : "load") +
617     X86Operand &Op, unsigned AccessSize, bool IsWrite,
687   EmitCallAsanReport(AccessSize, IsWrite, Ctx, Out, RegCtx);
692     X86Operand &Op, unsigned AccessSize, bool IsWrite,
728   EmitCallAsanReport(AccessSize, IsWrite, Ctx, Out, RegCtx);
842                                  bool IsWrite,
847                                  bool IsWrite,
864   void EmitCallAsanReport(unsigned AccessSize, bool IsWrite, MCContext &Ctx,
879                                             (IsWrite ? "store" : "load") +
888     X86Operand &Op, unsigned AccessSize, bool IsWrite,
959   EmitCallAsanReport(AccessSize, IsWrite, Ctx, Out, RegCtx);
964     X86Operand &Op, unsigned AccessSize, bool IsWrite,
1001   EmitCallAsanReport(AccessSize, IsWrite, Ctx, Out, RegCtx);