Lines Matching refs:reg
375 efab_dword_t reg;
377 reg.opaque = falcon_mdio_read ( efab, mmd,
379 status = EFAB_DWORD_FIELD ( reg,
1163 #define FCN_REVISION_REG(efab, reg) \
1164 ( ( efab->pci_revision == FALCON_REV_B0 ) ? reg ## _B0 : reg ## _A1 )
1166 #define EFAB_SET_OWORD_FIELD_VER(efab, reg, field, val) \
1168 EFAB_SET_OWORD_FIELD ( reg, field ## _B0, val ); \
1170 EFAB_SET_OWORD_FIELD ( reg, field ## _A1, val );
1176 unsigned int reg ) {
1177 outl ( reg, efab->iobase + FCN_IOM_IND_ADR_REG );
1183 unsigned int reg ) {
1184 outl ( reg, efab->iobase + FCN_IOM_IND_ADR_REG );
1190 #define _falcon_writel( efab, value, reg ) \
1191 writel ( (value), (efab)->membase + (reg) )
1192 #define _falcon_readl( efab, reg ) readl ( (efab)->membase + (reg) )
1201 falcon_write ( struct efab_nic *efab, efab_oword_t *value, unsigned int reg )
1205 reg, EFAB_OWORD_VAL ( *value ) );
1207 _falcon_writel ( efab, value->u32[0], reg + 0 );
1208 _falcon_writel ( efab, value->u32[1], reg + 4 );
1209 _falcon_writel ( efab, value->u32[2], reg + 8 );
1211 _falcon_writel ( efab, value->u32[3], reg + 12 );
1223 unsigned int reg = ( FCN_REVISION_REG ( efab, FCN_BUF_FULL_TBL_KER ) +
1227 reg, EFAB_QWORD_VAL ( *value ) );
1229 _falcon_writel ( efab, value->u32[0], reg + 0 );
1230 _falcon_writel ( efab, value->u32[1], reg + 4 );
1239 falcon_writel ( struct efab_nic *efab, efab_dword_t *value, unsigned int reg )
1242 reg, EFAB_DWORD_VAL ( *value ) );
1243 _falcon_writel ( efab, value->u32[0], reg );
1251 falcon_read ( struct efab_nic *efab, efab_oword_t *value, unsigned int reg )
1253 value->u32[0] = _falcon_readl ( efab, reg + 0 );
1255 value->u32[1] = _falcon_readl ( efab, reg + 4 );
1256 value->u32[2] = _falcon_readl ( efab, reg + 8 );
1257 value->u32[3] = _falcon_readl ( efab, reg + 12 );
1260 reg, EFAB_OWORD_VAL ( *value ) );
1271 unsigned int reg = ( FCN_REVISION_REG ( efab, FCN_BUF_FULL_TBL_KER ) +
1274 value->u32[0] = _falcon_readl ( efab, reg + 0 );
1275 value->u32[1] = _falcon_readl ( efab, reg + 4 );
1277 reg, EFAB_QWORD_VAL ( *value ) );
1285 falcon_readl ( struct efab_nic *efab, efab_dword_t *value, unsigned int reg )
1287 value->u32[0] = _falcon_readl ( efab, reg );
1289 reg, EFAB_DWORD_VAL ( *value ) );
1293 efab_oword_t reg; \
1294 falcon_read ( efab, ®, _reg ); \
1296 EFAB_OWORD_VAL ( reg ) ); \
1300 efab_dword_t reg; \
1301 efab->mac_op->mac_readl ( efab, ®, _mac_reg ); \
1303 EFAB_DWORD_VAL ( reg ) ); \
1331 efab_dword_t reg;
1333 EFAB_POPULATE_DWORD_1 ( reg, FCN_EVQ_RPTR_DWORD, ev_queue->read_ptr );
1334 falcon_writel ( efab, ®,
1403 efab_oword_t reg;
1409 falcon_read ( efab, ®, FCN_EE_SPI_HCMD_REG );
1410 if ( EFAB_OWORD_FIELD ( reg, FCN_EE_SPI_HCMD_CMD_EN ) == 0 )
1425 efab_oword_t reg;
1451 memcpy ( ®, data_out, len );
1452 falcon_write ( efab, ®, FCN_EE_SPI_HDATA_REG );
1457 EFAB_POPULATE_OWORD_1 ( reg, FCN_EE_SPI_HADR_ADR, address );
1458 falcon_write ( efab, ®, FCN_EE_SPI_HADR_REG );
1464 EFAB_POPULATE_OWORD_7 ( reg,
1472 falcon_write ( efab, ®, FCN_EE_SPI_HCMD_REG );
1481 falcon_read ( efab, ®, FCN_EE_SPI_HDATA_REG );
1482 memcpy ( data_in, ®, len );
1515 efab_oword_t reg;
1517 falcon_read ( efab, ®, FCN_GPIO_CTL_REG_KER );
1520 EFAB_SET_OWORD_FIELD ( reg, FCN_GPIO0_OEN, ( data ? 0 : 1 ) );
1523 EFAB_SET_OWORD_FIELD ( reg, FCN_GPIO3_OEN, ( data ? 0 : 1 ) );
1530 falcon_write ( efab, ®, FCN_GPIO_CTL_REG_KER );
1538 efab_oword_t reg;
1540 falcon_read ( efab, ®, FCN_GPIO_CTL_REG_KER );
1543 return EFAB_OWORD_FIELD ( reg, FCN_GPIO0_IN );
1546 return EFAB_OWORD_FIELD ( reg, FCN_GPIO3_IN );
1600 efab_oword_t reg;
1610 EFAB_POPULATE_OWORD_1 ( reg, FCN_MD_PHY_ADR, location );
1611 falcon_write ( efab, ®, FCN_MD_PHY_ADR_REG_KER );
1615 EFAB_POPULATE_OWORD_2 ( reg,
1623 EFAB_POPULATE_OWORD_2 ( reg,
1627 falcon_write ( efab, ®, FCN_MD_ID_REG_KER );
1631 EFAB_POPULATE_OWORD_1 ( reg, FCN_MD_TXD, value );
1632 falcon_write ( efab, ®, FCN_MD_TXD_REG_KER );
1634 EFAB_POPULATE_OWORD_2 ( reg,
1637 falcon_write ( efab, ®, FCN_MD_CS_REG_KER );
1642 EFAB_POPULATE_OWORD_2 ( reg,
1645 falcon_write ( efab, ®, FCN_MD_CS_REG_KER );
1653 efab_oword_t reg;
1662 EFAB_POPULATE_OWORD_1 ( reg, FCN_MD_PHY_ADR, location );
1663 falcon_write ( efab, ®, FCN_MD_PHY_ADR_REG_KER );
1665 EFAB_POPULATE_OWORD_2 ( reg,
1668 falcon_write ( efab, ®, FCN_MD_ID_REG_KER);
1671 EFAB_POPULATE_OWORD_2 ( reg,
1679 EFAB_POPULATE_OWORD_2 ( reg,
1682 falcon_write ( efab, ®, FCN_MD_ID_REG_KER );
1685 EFAB_POPULATE_OWORD_2 ( reg,
1690 falcon_write ( efab, ®, FCN_MD_CS_REG_KER );
1695 EFAB_POPULATE_OWORD_2 ( reg,
1698 falcon_write ( efab, ®, FCN_MD_CS_REG_KER );
1704 falcon_read ( efab, ®, FCN_MD_RXD_REG_KER );
1705 value = EFAB_OWORD_FIELD ( reg, FCN_MD_RXD );
1725 efab_oword_t reg;
1737 EFAB_POPULATE_OWORD_5 ( reg,
1744 falcon_write ( efab, ®, FCN_MAC0_CTRL_REG_KER );
1911 efab_dword_t reg;
1914 EFAB_POPULATE_DWORD_1 ( reg, GM_SW_RST, 1 );
1915 falcon_gmac_writel ( efab, ®, GM_CFG1_REG_MAC );
1919 EFAB_POPULATE_DWORD_1 ( reg, GM_SW_RST, 0 );
1920 falcon_gmac_writel ( efab, ®, GM_CFG1_REG_MAC );
1927 EFAB_POPULATE_DWORD_1 ( reg, GM_MGMT_CLK_SEL, 0x4 );
1928 falcon_gmac_writel ( efab, ®, GM_MII_MGMT_CFG_REG_MAC );
1936 efab_dword_t reg;
1944 EFAB_POPULATE_DWORD_4 ( reg,
1949 falcon_gmac_writel ( efab, ®, GM_CFG1_REG_MAC );
1955 EFAB_POPULATE_DWORD_4 ( reg,
1960 falcon_gmac_writel ( efab, ®, GM_CFG2_REG_MAC );
1964 EFAB_POPULATE_DWORD_1 ( reg, GM_MAX_FLEN,
1966 falcon_gmac_writel ( efab, ®, GM_MAX_FLEN_REG_MAC );
1970 EFAB_POPULATE_DWORD_5 ( reg,
1976 falcon_gmac_writel ( efab, ®, GMF_CFG0_REG_MAC );
1980 EFAB_POPULATE_DWORD_2 ( reg,
1983 falcon_gmac_writel ( efab, ®, GMF_CFG1_REG_MAC );
1987 EFAB_POPULATE_DWORD_2 ( reg,
1990 falcon_gmac_writel ( efab, ®, GMF_CFG2_REG_MAC );
1994 EFAB_POPULATE_DWORD_2 ( reg,
1997 falcon_gmac_writel ( efab, ®, GMF_CFG3_REG_MAC );
2001 EFAB_POPULATE_DWORD_1 ( reg, GMF_HSTFLTRFRM_PAUSE, 1 );
2002 falcon_gmac_writel ( efab, ®, GMF_CFG4_REG_MAC );
2008 falcon_gmac_readl ( efab, ®, GMF_CFG5_REG_MAC );
2009 EFAB_SET_DWORD_FIELD ( reg, GMF_CFGBYTMODE, bytemode );
2010 EFAB_SET_DWORD_FIELD ( reg, GMF_CFGHDPLX, half_duplex );
2011 EFAB_SET_DWORD_FIELD ( reg, GMF_HSTDRPLT64, half_duplex );
2012 EFAB_SET_DWORD_FIELD ( reg, GMF_HSTFLTRFRMDC_PAUSE, 0 );
2013 falcon_gmac_writel ( efab, ®, GMF_CFG5_REG_MAC );
2017 EFAB_POPULATE_DWORD_4 ( reg,
2022 falcon_gmac_writel ( efab, ®, GM_ADR1_REG_MAC );
2024 EFAB_POPULATE_DWORD_2 ( reg,
2027 falcon_gmac_writel ( efab, ®, GM_ADR2_REG_MAC );
2132 efab_dword_t reg;
2137 falcon_xmac_readl ( efab, ®, FCN_XM_MGT_INT_REG_MAC_B0 );
2138 falcon_xmac_readl ( efab, ®, FCN_XM_MGT_INT_REG_MAC_B0 );
2140 if ( EFAB_DWORD_FIELD ( reg, FCN_XM_LCLFLT ) ||
2141 EFAB_DWORD_FIELD ( reg, FCN_XM_RMTFLT ) ) {
2143 EFAB_DWORD_VAL ( reg ) );
2153 efab_dword_t reg;
2160 falcon_xmac_readl ( efab, ®, FCN_XM_MGT_INT_REG_MAC_B0 );
2162 EFAB_POPULATE_DWORD_2 ( reg,
2165 falcon_xmac_readl ( efab, ®, FCN_XM_MGT_INT_MSK_REG_MAC_B0 );
2175 efab_dword_t reg;
2178 EFAB_POPULATE_DWORD_1 ( reg, FCN_XM_CORE_RST, 1 );
2179 falcon_xmac_writel ( efab, ®, FCN_XM_GLB_CFG_REG_MAC );
2183 falcon_xmac_readl ( efab, ®,
2185 if ( EFAB_DWORD_FIELD ( reg, FCN_XM_CORE_RST ) == 0 )
2195 efab_dword_t reg;
2201 EFAB_POPULATE_DWORD_1 ( reg, FCN_XX_RST_XX_EN, 1 );
2202 falcon_xmac_writel ( efab, ®, FCN_XX_PWR_RST_REG_MAC );
2206 falcon_xmac_readl ( efab, ®, FCN_XX_PWR_RST_REG_MAC );
2207 if ( EFAB_DWORD_FIELD ( reg, FCN_XX_RST_XX_EN ) == 0 ) {
2220 efab_dword_t reg;
2228 falcon_xmac_readl ( efab, ®, FCN_XX_CORE_STAT_REG_MAC );
2229 align_done = EFAB_DWORD_FIELD ( reg, FCN_XX_ALIGN_DONE );
2231 sync = EFAB_DWORD_FIELD ( reg, FCN_XX_SYNC_STAT );
2238 EFAB_SET_DWORD_FIELD ( reg, FCN_XX_COMMA_DET, FCN_XX_COMMA_DET_RESET );
2239 EFAB_SET_DWORD_FIELD ( reg, FCN_XX_CHARERR, FCN_XX_CHARERR_RESET);
2240 EFAB_SET_DWORD_FIELD ( reg, FCN_XX_DISPERR, FCN_XX_DISPERR_RESET);
2241 falcon_xmac_writel ( efab, ®, FCN_XX_CORE_STAT_REG_MAC );
2263 efab_dword_t reg;
2267 EFAB_POPULATE_DWORD_3 ( reg,
2271 falcon_xmac_writel ( efab, ®, FCN_XM_GLB_CFG_REG_MAC );
2274 EFAB_POPULATE_DWORD_6 ( reg,
2281 falcon_xmac_writel ( efab, ®, FCN_XM_TX_CFG_REG_MAC );
2284 EFAB_POPULATE_DWORD_4 ( reg,
2289 falcon_xmac_writel ( efab, ®, FCN_XM_RX_CFG_REG_MAC );
2293 EFAB_POPULATE_DWORD_1 ( reg,
2295 falcon_xmac_writel ( efab, ®, FCN_XM_RX_PARAM_REG_MAC );
2296 EFAB_POPULATE_DWORD_2 ( reg,
2299 falcon_xmac_writel ( efab, ®, FCN_XM_TX_PARAM_REG_MAC );
2302 EFAB_POPULATE_DWORD_2 ( reg,
2305 falcon_xmac_writel ( efab, ®, FCN_XM_FC_REG_MAC );
2308 EFAB_POPULATE_DWORD_4 ( reg,
2313 falcon_xmac_writel ( efab, ®, FCN_XM_ADR_LO_REG_MAC );
2314 EFAB_POPULATE_DWORD_2 ( reg,
2317 falcon_xmac_writel ( efab, ®, FCN_XM_ADR_HI_REG_MAC );
2670 int rc, reg;
2685 reg = (1 << CLK312_EN_LBN);
2686 falcon_mdio_write ( efab, MDIO_MMD_PCS, PCS_TEST_SELECT_REG, reg);
2750 int rc, reg, i;
2760 reg = falcon_mdio_read ( efab, MDIO_MMD_DTEXS, PMC_MASTER_REG );
2761 reg |= PMC_MASTER_ANLG_CTRL;
2762 falcon_mdio_write ( efab, MDIO_MMD_DTEXS, PMC_MASTER_REG, reg );
2768 reg = falcon_mdio_read ( efab, MDIO_MMD_DTEXS, addr );
2769 reg = ( reg & ~PMC_ANALOG_RX_EQ_MASK ) | PMC_ANALOG_RX_EQ_FULL;
2770 falcon_mdio_write ( efab, MDIO_MMD_DTEXS, addr, reg );
2774 reg = falcon_mdio_read ( efab, MDIO_MMD_DTEXS, PMC_MCONF2_REG );
2775 reg = ( reg & ~PMC_MCONF2_REDGE) | PMC_MCONF2_TEDGE;
2776 falcon_mdio_write ( efab, MDIO_MMD_DTEXS, PMC_MCONF2_REG, reg );
2850 efab_dword_t reg;
2857 EFAB_POPULATE_DWORD_7 ( reg,
2865 falcon_xmac_writel ( efab, ®, FCN_XX_PWR_RST_REG_MAC);
3379 efab_oword_t reg;
3383 falcon_read ( efab, ®, FCN_NIC_STAT_REG );
3384 EFAB_SET_OWORD_FIELD ( reg, FCN_ONCHIP_SRAM, 1 );
3385 falcon_write ( efab, ®, FCN_NIC_STAT_REG );
3388 EFAB_POPULATE_OWORD_2 ( reg,
3391 falcon_write ( efab, ®, FCN_GPIO_CTL_REG_KER );
3394 EFAB_POPULATE_OWORD_2 ( reg,
3397 falcon_write ( efab, ®, FCN_SRM_CFG_REG_KER );
3406 falcon_read ( efab, ®, FCN_SRM_CFG_REG_KER );
3407 if ( !EFAB_OWORD_FIELD ( reg, FCN_SRAM_OOB_BT_INIT_EN ) )
3419 efab_oword_t reg;
3425 falcon_read ( efab, ®, FCN_SPARE_REG_KER );
3426 EFAB_SET_OWORD_FIELD ( reg, FCN_MEM_PERR_EN_TX_DATA, 0 );
3427 falcon_write ( efab, ®, FCN_SPARE_REG_KER );
3430 EFAB_POPULATE_OWORD_1 ( reg, FCN_SRM_TX_DC_BASE_ADR, 0x130000 );
3431 falcon_write ( efab, ®, FCN_SRM_TX_DC_CFG_REG_KER );
3432 EFAB_POPULATE_OWORD_1 ( reg, FCN_TX_DC_SIZE, 1 /* 16 descriptors */ );
3433 falcon_write ( efab, ®, FCN_TX_DC_CFG_REG_KER );
3434 EFAB_POPULATE_OWORD_1 ( reg, FCN_SRM_RX_DC_BASE_ADR, 0x100000 );
3435 falcon_write ( efab, ®, FCN_SRM_RX_DC_CFG_REG_KER );
3436 EFAB_POPULATE_OWORD_1 ( reg, FCN_RX_DC_SIZE, 2 /* 32 descriptors */ );
3437 falcon_write ( efab, ®, FCN_RX_DC_CFG_REG_KER );
3442 EFAB_POPULATE_OWORD_5 ( reg,
3448 falcon_write ( efab, ®, FCN_RX_FILTER_CTL_REG_KER );
3455 falcon_read ( efab, ®, FCN_RX_SELF_RST_REG_KER );
3456 EFAB_SET_OWORD_FIELD ( reg, FCN_RX_NODESC_WAIT_DIS, 1 );
3457 EFAB_SET_OWORD_FIELD ( reg, FCN_RX_RECOVERY_EN, 1 );
3458 EFAB_SET_OWORD_FIELD ( reg, FCN_RX_ISCSI_DIS, 1 );
3459 falcon_write ( efab, ®, FCN_RX_SELF_RST_REG_KER );
3478 falcon_read ( efab, ®, FCN_TX_CFG2_REG_KER );
3479 EFAB_SET_OWORD_FIELD ( reg, FCN_TX_DIS_NON_IP_EV, 1 );
3480 falcon_write ( efab, ®, FCN_TX_CFG2_REG_KER );
3482 falcon_read ( efab, ®, FCN_RX_CFG_REG_KER );
3483 EFAB_SET_OWORD_FIELD_VER ( efab, reg, FCN_RX_USR_BUF_SIZE,
3486 EFAB_SET_OWORD_FIELD ( reg, FCN_RX_INGR_EN_B0, 1 );
3487 EFAB_SET_OWORD_FIELD_VER ( efab, reg, FCN_RX_XON_MAC_TH,
3489 EFAB_SET_OWORD_FIELD_VER ( efab, reg, FCN_RX_XOFF_MAC_TH,
3491 EFAB_SET_OWORD_FIELD_VER ( efab, reg, FCN_RX_XOFF_MAC_EN, tx_fc);
3492 falcon_write ( efab, ®, FCN_RX_CFG_REG_KER );
3508 efab_oword_t reg;
3517 EFAB_POPULATE_OWORD_3 ( reg,
3521 falcon_write ( efab, ®,
3525 EFAB_POPULATE_OWORD_8 ( reg,
3534 falcon_write ( efab, ®,
3539 EFAB_POPULATE_OWORD_8 ( reg,
3548 falcon_write ( efab, ®,
3552 EFAB_POPULATE_OWORD_1 ( reg,
3554 falcon_write ( efab, ®, FCN_INT_ADR_REG_KER );
3612 efab_dword_t reg;
3615 EFAB_POPULATE_DWORD_1 ( reg, FCN_RX_DESC_WPTR_DWORD, ptr );
3616 falcon_writel ( efab, ®, FCN_RX_DESC_UPD_REG_KER_DWORD );
3640 efab_dword_t reg;
3643 EFAB_POPULATE_DWORD_1 ( reg, FCN_TX_DESC_WPTR_DWORD, ptr );
3644 falcon_writel ( efab, ®, FCN_TX_DESC_UPD_REG_KER_DWORD );
3804 efab_dword_t reg;
3808 falcon_readl( efab, ®, INT_ISR0_B0 );
3814 falcon_readl ( efab, ®,