Cross Reference: /external/v8/src/arm/assembler-arm.cc

Lines Matching refs:src1
1509 void Assembler::and_(Register dst, Register src1, const Operand& src2,
1511   addrmod1(cond | AND | s, src1, dst, src2);
1515 void Assembler::eor(Register dst, Register src1, const Operand& src2,
1517   addrmod1(cond | EOR | s, src1, dst, src2);
1521 void Assembler::sub(Register dst, Register src1, const Operand& src2,
1523   addrmod1(cond | SUB | s, src1, dst, src2);
1527 void Assembler::rsb(Register dst, Register src1, const Operand& src2,
1529   addrmod1(cond | RSB | s, src1, dst, src2);
1533 void Assembler::add(Register dst, Register src1, const Operand& src2,
1535   addrmod1(cond | ADD | s, src1, dst, src2);
1539 void Assembler::adc(Register dst, Register src1, const Operand& src2,
1541   addrmod1(cond | ADC | s, src1, dst, src2);
1545 void Assembler::sbc(Register dst, Register src1, const Operand& src2,
1547   addrmod1(cond | SBC | s, src1, dst, src2);
1551 void Assembler::rsc(Register dst, Register src1, const Operand& src2,
1553   addrmod1(cond | RSC | s, src1, dst, src2);
1557 void Assembler::tst(Register src1, const Operand& src2, Condition cond) {
1558   addrmod1(cond | TST | S, src1, r0, src2);
1562 void Assembler::teq(Register src1, const Operand& src2, Condition cond) {
1563   addrmod1(cond | TEQ | S, src1, r0, src2);
1567 void Assembler::cmp(Register src1, const Operand& src2, Condition cond) {
1568   addrmod1(cond | CMP | S, src1, r0, src2);
1579 void Assembler::cmn(Register src1, const Operand& src2, Condition cond) {
1580   addrmod1(cond | CMN | S, src1, r0, src2);
1584 void Assembler::orr(Register dst, Register src1, const Operand& src2,
1586   addrmod1(cond | ORR | s, src1, dst, src2);
1650 void Assembler::bic(Register dst, Register src1, const Operand& src2,
1652   addrmod1(cond | BIC | s, src1, dst, src2);
1662 void Assembler::mla(Register dst, Register src1, Register src2, Register srcA,
1664   DCHECK(!dst.is(pc) && !src1.is(pc) && !src2.is(pc) && !srcA.is(pc));
1666        src2.code()*B8 | B7 | B4 | src1.code());
1670 void Assembler::mls(Register dst, Register src1, Register src2, Register srcA,
1672   DCHECK(!dst.is(pc) && !src1.is(pc) && !src2.is(pc) && !srcA.is(pc));
1675        src2.code()*B8 | B7 | B4 | src1.code());
1679 void Assembler::sdiv(Register dst, Register src1, Register src2,
1681   DCHECK(!dst.is(pc) && !src1.is(pc) && !src2.is(pc));
1684        src2.code()*B8 | B4 | src1.code());
1688 void Assembler::udiv(Register dst, Register src1, Register src2,
1690   DCHECK(!dst.is(pc) && !src1.is(pc) && !src2.is(pc));
1693        src2.code() * B8 | B4 | src1.code());
1697 void Assembler::mul(Register dst, Register src1, Register src2, SBit s,
1699   DCHECK(!dst.is(pc) && !src1.is(pc) && !src2.is(pc));
1701   emit(cond | s | dst.code() * B16 | src2.code() * B8 | B7 | B4 | src1.code());
1705 void Assembler::smmla(Register dst, Register src1, Register src2, Register srcA,
1707   DCHECK(!dst.is(pc) && !src1.is(pc) && !src2.is(pc) && !srcA.is(pc));
1709        srcA.code() * B12 | src2.code() * B8 | B4 | src1.code());
1713 void Assembler::smmul(Register dst, Register src1, Register src2,
1715   DCHECK(!dst.is(pc) && !src1.is(pc) && !src2.is(pc));
1717        src2.code() * B8 | B4 | src1.code());
1723                       Register src1,
1727   DCHECK(!dstL.is(pc) && !dstH.is(pc) && !src1.is(pc) && !src2.is(pc));
1730        src2.code()*B8 | B7 | B4 | src1.code());
1736                       Register src1,
1740   DCHECK(!dstL.is(pc) && !dstH.is(pc) && !src1.is(pc) && !src2.is(pc));
1743        src2.code()*B8 | B7 | B4 | src1.code());
1749                       Register src1,
1753   DCHECK(!dstL.is(pc) && !dstH.is(pc) && !src1.is(pc) && !src2.is(pc));
1756        src2.code()*B8 | B7 | B4 | src1.code());
1762                       Register src1,
1766   DCHECK(!dstL.is(pc) && !dstH.is(pc) && !src1.is(pc) && !src2.is(pc));
1769        src2.code()*B8 | B7 | B4 | src1.code());
1876                       Register src1,
1883   DCHECK(!src1.is(pc));
1889   emit(cond | 0x68*B20 | src1.code()*B16 | dst.code()*B12 |
1895                       Register src1,
1902   DCHECK(!src1.is(pc));
1909   emit(cond | 0x68*B20 | src1.code()*B16 | dst.code()*B12 |
1926 void Assembler::sxtab(Register dst, Register src1, Register src2, int rotate,
1932   DCHECK(!src1.is(pc));
1935   emit(cond | 0x6A * B20 | src1.code() * B16 | dst.code() * B12 |
1952 void Assembler::sxtah(Register dst, Register src1, Register src2, int rotate,
1958   DCHECK(!src1.is(pc));
1961   emit(cond | 0x6B * B20 | src1.code() * B16 | dst.code() * B12 |
1978 void Assembler::uxtab(Register dst, Register src1, Register src2, int rotate,
1984   DCHECK(!src1.is(pc));
1987   emit(cond | 0x6E * B20 | src1.code() * B16 | dst.code() * B12 |
2016 void Assembler::uxtah(Register dst, Register src1, Register src2, int rotate,
2022   DCHECK(!src1.is(pc));
2025   emit(cond | 0x6F * B20 | src1.code() * B16 | dst.code() * B12 |
2123 void Assembler::strd(Register src1, Register src2,
2126   DCHECK(!src1.is(lr));  // r14.
2127   DCHECK_EQ(0, src1.code() % 2);
2128   DCHECK_EQ(src1.code() + 1, src2.code());
2129   addrmod3(cond | B7 | B6 | B5 | B4, src1, dst);
2139 void Assembler::strex(Register src1, Register src2, Register dst,
2144   emit(cond | B24 | B23 | dst.code() * B16 | src1.code() * B12 | 0xf9 * B4 |
2155 void Assembler::strexb(Register src1, Register src2, Register dst,
2160   emit(cond | B24 | B23 | B22 | dst.code() * B16 | src1.code() * B12 |
2171 void Assembler::strexh(Register src1, Register src2, Register dst,
2176   emit(cond | B24 | B23 | B22 | B21 | dst.code() * B16 | src1.code() * B12 |
2892                      const Register src1,
2900   DCHECK(!src1.is(pc) && !src2.is(pc));
2904        src1.code()*B12 | 0xB*B8 | m*B5 | B4 | vm);
3229                      const DwVfpRegister src1,
3238   DCHECK(VfpRegisterIsAvailable(src1));
3243   src1.split_code(&vn, &n);
3251 void Assembler::vadd(const SwVfpRegister dst, const SwVfpRegister src1,
3261   src1.split_code(&vn, &n);
3270                      const DwVfpRegister src1,
3279   DCHECK(VfpRegisterIsAvailable(src1));
3284   src1.split_code(&vn, &n);
3292 void Assembler::vsub(const SwVfpRegister dst, const SwVfpRegister src1,
3302   src1.split_code(&vn, &n);
3311                      const DwVfpRegister src1,
3320   DCHECK(VfpRegisterIsAvailable(src1));
3325   src1.split_code(&vn, &n);
3333 void Assembler::vmul(const SwVfpRegister dst, const SwVfpRegister src1,
3343   src1.split_code(&vn, &n);
3352                      const DwVfpRegister src1,
3359   DCHECK(VfpRegisterIsAvailable(src1));
3364   src1.split_code(&vn, &n);
3372 void Assembler::vmla(const SwVfpRegister dst, const SwVfpRegister src1,
3380   src1.split_code(&vn, &n);
3389                      const DwVfpRegister src1,
3396   DCHECK(VfpRegisterIsAvailable(src1));
3401   src1.split_code(&vn, &n);
3409 void Assembler::vmls(const SwVfpRegister dst, const SwVfpRegister src1,
3417   src1.split_code(&vn, &n);
3426                      const DwVfpRegister src1,
3435   DCHECK(VfpRegisterIsAvailable(src1));
3440   src1.split_code(&vn, &n);
3448 void Assembler::vdiv(const SwVfpRegister dst, const SwVfpRegister src1,
3458   src1.split_code(&vn, &n);
3466 void Assembler::vcmp(const DwVfpRegister src1,
3473   DCHECK(VfpRegisterIsAvailable(src1));
3476   src1.split_code(&vd, &d);
3484 void Assembler::vcmp(const SwVfpRegister src1, const SwVfpRegister src2,
3491   src1.split_code(&vd, &d);
3499 void Assembler::vcmp(const DwVfpRegister src1,
3506   DCHECK(VfpRegisterIsAvailable(src1));
3509   src1.split_code(&vd, &d);
3514 void Assembler::vcmp(const SwVfpRegister src1, const float src2,
3522   src1.split_code(&vd, &d);
3527 void Assembler::vmaxnm(const DwVfpRegister dst, const DwVfpRegister src1,
3535   src1.split_code(&vn, &n);
3543 void Assembler::vmaxnm(const SwVfpRegister dst, const SwVfpRegister src1,
3551   src1.split_code(&vn, &n);
3559 void Assembler::vminnm(const DwVfpRegister dst, const DwVfpRegister src1,
3567   src1.split_code(&vn, &n);
3575 void Assembler::vminnm(const SwVfpRegister dst, const SwVfpRegister src1,
3583   src1.split_code(&vn, &n);
3592                      const DwVfpRegister src1, const DwVfpRegister src2) {
3600   src1.split_code(&vn, &n);
3624                      const SwVfpRegister src1, const SwVfpRegister src2) {
3632   src1.split_code(&vn, &n);
4121 void Assembler::veor(DwVfpRegister dst, DwVfpRegister src1,
4129   src1.split_code(&vn, &n);
4140                                        const QwNeonRegister src1,
4175   src1.split_code(&vn, &n);
4182 void Assembler::vand(QwNeonRegister dst, QwNeonRegister src1,
4187   emit(EncodeNeonBinaryBitwiseOp(VAND, dst, src1, src2));
4190 void Assembler::vbsl(QwNeonRegister dst, const QwNeonRegister src1,
4195   emit(EncodeNeonBinaryBitwiseOp(VBSL, dst, src1, src2));
4198 void Assembler::veor(QwNeonRegister dst, QwNeonRegister src1,
4203   emit(EncodeNeonBinaryBitwiseOp(VEOR, dst, src1, src2));
4206 void Assembler::vorr(QwNeonRegister dst, QwNeonRegister src1,
4211   emit(EncodeNeonBinaryBitwiseOp(VORR, dst, src1, src2));
4228                              QwNeonRegister src1, QwNeonRegister src2) {
4268   src1.split_code(&vn, &n);
4291                              const QwNeonRegister src1,
4335   src1.split_code(&vn, &n);
4346                              const QwNeonRegister src1,
4350   return EncodeNeonBinOp(op, static_cast<NeonDataType>(size), dst, src1, src2);
4353 void Assembler::vadd(QwNeonRegister dst, QwNeonRegister src1,
4358   emit(EncodeNeonBinOp(VADDF, dst, src1, src2));
4361 void Assembler::vadd(NeonSize size, QwNeonRegister dst, QwNeonRegister src1,
4366   emit(EncodeNeonBinOp(VADD, size, dst, src1, src2));
4369 void Assembler::vqadd(NeonDataType dt, QwNeonRegister dst, QwNeonRegister src1,
4374   emit(EncodeNeonBinOp(VQADD, dt, dst, src1, src2));
4377 void Assembler::vsub(QwNeonRegister dst, QwNeonRegister src1,
4382   emit(EncodeNeonBinOp(VSUBF, dst, src1, src2));
4385 void Assembler::vsub(NeonSize size, QwNeonRegister dst, QwNeonRegister src1,
4390   emit(EncodeNeonBinOp(VSUB, size, dst, src1, src2));
4393 void Assembler::vqsub(NeonDataType dt, QwNeonRegister dst, QwNeonRegister src1,
4398   emit(EncodeNeonBinOp(VQSUB, dt, dst, src1, src2));
4401 void Assembler::vmul(QwNeonRegister dst, QwNeonRegister src1,
4406   emit(EncodeNeonBinOp(VMULF, dst, src1, src2));
4410                      const QwNeonRegister src1, const QwNeonRegister src2) {
4414   emit(EncodeNeonBinOp(VMUL, size, dst, src1, src2));
4417 void Assembler::vmin(const QwNeonRegister dst, const QwNeonRegister src1,
4422   emit(EncodeNeonBinOp(VMINF, dst, src1, src2));
4425 void Assembler::vmin(NeonDataType dt, QwNeonRegister dst, QwNeonRegister src1,
4430   emit(EncodeNeonBinOp(VMIN, dt, dst, src1, src2));
4433 void Assembler::vmax(QwNeonRegister dst, QwNeonRegister src1,
4438   emit(EncodeNeonBinOp(VMAXF, dst, src1, src2));
4441 void Assembler::vmax(NeonDataType dt, QwNeonRegister dst, QwNeonRegister src1,
4446   emit(EncodeNeonBinOp(VMAX, dt, dst, src1, src2));
4516 void Assembler::vrecps(QwNeonRegister dst, QwNeonRegister src1,
4521   emit(EncodeNeonBinOp(VRECPS, dst, src1, src2));
4524 void Assembler::vrsqrts(QwNeonRegister dst, QwNeonRegister src1,
4529   emit(EncodeNeonBinOp(VRSQRTS, dst, src1, src2));
4532 void Assembler::vtst(NeonSize size, QwNeonRegister dst, QwNeonRegister src1,
4537   emit(EncodeNeonBinOp(VTST, size, dst, src1, src2));
4540 void Assembler::vceq(QwNeonRegister dst, QwNeonRegister src1,
4545   emit(EncodeNeonBinOp(VCEQF, dst, src1, src2));
4548 void Assembler::vceq(NeonSize size, QwNeonRegister dst, QwNeonRegister src1,
4553   emit(EncodeNeonBinOp(VCEQ, size, dst, src1, src2));
4556 void Assembler::vcge(QwNeonRegister dst, QwNeonRegister src1,
4561   emit(EncodeNeonBinOp(VCGEF, dst, src1, src2));
4564 void Assembler::vcge(NeonDataType dt, QwNeonRegister dst, QwNeonRegister src1,
4569   emit(EncodeNeonBinOp(VCGE, dt, dst, src1, src2));
4572 void Assembler::vcgt(QwNeonRegister dst, QwNeonRegister src1,
4577   emit(EncodeNeonBinOp(VCGTF, dst, src1, src2));
4580 void Assembler::vcgt(NeonDataType dt, QwNeonRegister dst, QwNeonRegister src1,
4585   emit(EncodeNeonBinOp(VCGT, dt, dst, src1, src2));
4588 void Assembler::vext(QwNeonRegister dst, const QwNeonRegister src1,
4596   src1.split_code(&vn, &n);