Cross Reference: /external/valgrind/VEX/priv/host_mips

Lines Matching defs:tHi
1075             HReg tHi = newVRegI(env);
1091             addInstr(env, MIPSInstr_Mfhi(tHi));
1095                           tHi, MIPSRH_Imm(False, 32)));
1194             HReg tHi = newVRegI(env);
1205             addInstr(env, MIPSInstr_Mfhi(tHi));
1208             addInstr(env, MIPSInstr_Shft(Mshft_SLL, False, tHi_1, tHi,
1223             HReg tHi   = iselWordExpr_R(env, e->Iex.Binop.arg1);
1243             /* sll tHi_1, tHi,   shift
1246             addInstr(env, MIPSInstr_Shft(Mshft_SLL, True, tHi_1, tHi,
1257             HReg tHi = iselWordExpr_R(env, e->Iex.Binop.arg1);
1264             addInstr(env, MIPSInstr_Shft(Mshft_SLL, False, tHi_1, tHi,
2199             HReg tHi = newVRegI(env);
2206             addInstr(env, MIPSInstr_Mfhi(tHi));
2208             *rHi = tHi;
2223             HReg tHi = newVRegI(env);
2227             addInstr(env, MIPSInstr_Mfhi(tHi));
2229             *rHi = tHi;
2242             HReg tHi = newVRegI(env);
2246             addInstr(env, MIPSInstr_Mfhi(tHi));
2248             *rHi = tHi;
2294       HReg tHi = newVRegI(env);
2296       addInstr(env, MIPSInstr_Load(4, tHi, MIPSAMode_IR(0, r_addr), mode64));
2298       *rHi = tHi;
2309       HReg tHi = newVRegI(env);
2318          addInstr(env, MIPSInstr_LI(tHi, (ULong) wHi));
2320          *rHi = tHi;
2330       HReg tHi = newVRegI(env);
2335       addInstr(env, MIPSInstr_Load(4, tHi, nextMIPSAModeInt(am_addr), mode64));
2336       *rHi = tHi;
2378             HReg tHi = newVRegI(env);
2395             addInstr(env, MIPSInstr_Alu(Malu_ADD, tHi, tHi1,
2398             *rHi = tHi;
2407             HReg tHi = newVRegI(env);
2422             addInstr(env, MIPSInstr_Alu(Malu_SUB, tHi, xHi, MIPSRH_Reg(yHi)));
2424             *rHi = tHi;
2431             HReg tHi = newVRegI(env);
2440             addInstr(env, MIPSInstr_Mfhi(tHi));
2442             *rHi = tHi;
2451             HReg tHi = newVRegI(env);
2457             addInstr(env, MIPSInstr_Mfhi(tHi));
2459             *rHi = tHi;
2477             HReg tHi = newVRegI(env);
2482             addInstr(env, MIPSInstr_Alu(op, tHi, xHi, MIPSRH_Reg(yHi)));
2484             *rHi = tHi;
2762             HReg tHi  = newVRegI(env);
2779             addInstr(env, MIPSInstr_Load(4, tHi, nextMIPSAModeFloat(am_addr),
2782             addInstr(env, MIPSInstr_Load(4, tHi, am_addr, mode64));
2790             *rHi = tHi;
2806             HReg tHi = newVRegI(env);
2815             addInstr(env, mk_iMOVds_RR(tHi, tmp));
2818             *rHi = tHi;
2826             HReg tHi = newVRegI(env);
2828             addInstr(env, mk_iMOVds_RR(tHi, src));
2830             addInstr(env, MIPSInstr_Shft(Mshft_SRA, True, tHi, tHi,
2832             *rHi = tHi;
2840             HReg tHi = newVRegI(env);
2844             addInstr(env, MIPSInstr_Alu(Malu_ADD, tHi, hregMIPS_GPR0(mode64),
2846             *rHi = tHi;
2854             HReg tHi = newVRegI(env);
2857             addInstr(env, MIPSInstr_Alu(Malu_ADD, tHi, hregMIPS_GPR0(mode64),
2859             *rHi = tHi;
2866             HReg tHi  = newVRegI(env);
2887                tHi:tLo = arg | -arg. */
2888             addInstr(env, MIPSInstr_Alu(Malu_OR, tHi, yHi, MIPSRH_Reg(tmp1)));
2890             *rHi = tHi;
2919             HReg tHi = newVRegI(env);
2932             addInstr(env, MIPSInstr_Load(4, tHi, nextMIPSAModeFloat(am_addr),
2935             addInstr(env, MIPSInstr_Load(4, tHi, am_addr, mode64));
2943             *rHi = tHi;
2950             HReg tHi = newVRegI(env);
2951             iselInt64Expr(&tHi, &tLo, env, e->Iex.Unop.arg);
2953             addInstr(env, MIPSInstr_Alu(Malu_NOR, tHi, tHi, MIPSRH_Reg(tHi)));
2955             *rHi = tHi;