Cross Reference: /external/valgrind/VEX/priv/host_s390

Lines Matching defs:r10
951          HReg r10, r11, h1;
957          /* We use non-virtual registers r10 and r11 as pair */
958          r10  = make_gpr(10);
965          addInstr(env, s390_insn_divs(8, r10, r11, op2));
967          /* The result is in registers r10 (remainder) and r11 (quotient).
973          addInstr(env, s390_insn_move(8, *dst_hi, r10));
982             HReg r10, r11, h1;
990             /* We use non-virtual registers r10 and r11 as pair */
991             r10  = make_gpr(10);
998             addInstr(env, s390_insn_mul(8, r10, r11, op2, is_signed_multiply));
1000             /* The result is in registers r10 and r11. Assign to two virtual regs
1004             addInstr(env, s390_insn_move(8, *dst_hi, r10));
1010          HReg r10, r11, hi, lo;
1016          /* We use non-virtual registers r10 and r11 as pair */
1017          r10  = make_gpr(10);
1020          /* Move high 64 bits of the 1st operand into r10 and
1022          addInstr(env, s390_insn_move(8, r10, hi));
1026          addInstr(env, s390_insn_div(8, r10, r11, op2, is_signed_divide));
1028          /* The result is in registers r10 (remainder) and r11 (quotient).
1034          addInstr(env, s390_insn_move(8, *dst_hi, r10));
1139             HReg r10, r11;
1147             /* We use non-virtual registers r10 and r11 as pair */
1148             r10  = make_gpr(10);
1155             addInstr(env, s390_insn_mul(arg_size, r10, r11, op2, is_signed_multiply));
1157             /* The result is in registers r10 and r11. Combine them into a SIZE-bit
1160             addInstr(env, s390_insn_move(arg_size, res, r10));
1179             HReg r10, r11;
1184             /* We use non-virtual registers r10 and r11 as pair */
1185             r10  = make_gpr(10);
1188             /* Split the first operand and put the high 32 bits into r10 and
1190             addInstr(env, s390_insn_move(8, r10, h1));
1193             addInstr(env, s390_insn_alu(8, S390_ALU_RSH, r10, value));
1196             addInstr(env, s390_insn_div(4, r10, r11, op2, is_signed_divide));
1198             /* The result is in registers r10 (remainder) and r11 (quotient).
1203             addInstr(env, s390_insn_move(8, res, r10));
1777          HReg r10, r11;
1781             left-most zero bits) will be in r10. The value in r11 is unspecified
1783          r10  = make_gpr(10);
1786          addInstr(env, s390_insn_clz(8, r10, r11, opnd));
1787          addInstr(env, s390_insn_move(8, dst, r10));
3874          HReg r8, r9, r10, r11, r1;
3889          /* Use non-virtual registers r10 and r11 as pair for op3
3891          r10 = make_gpr(10);
3893          addInstr(env, s390_insn_move(8, r10, op3_high));
3900             addInstr(env, s390_insn_cdas(4, r8, r9, op2, r10, r11,
3903             addInstr(env, s390_insn_cdas(8, r8, r9, op2, r10, r11,
3908          addInstr(env, s390_insn_move(8, op3_high, r10));