Lines Matching refs:reg4
2789 const Register& reg4) {
2792 reg1.GetBit() | reg2.GetBit() | reg3.GetBit() | reg4.GetBit();
2803 const FPRegister& reg4) {
2805 reg1.GetBit() | reg2.GetBit() | reg3.GetBit() | reg4.GetBit();
2823 const Register& reg4) {
2825 reg1.GetBit() | reg2.GetBit() | reg3.GetBit() | reg4.GetBit();
2833 const FPRegister& reg4) {
2835 reg1.GetBit() | reg2.GetBit() | reg3.GetBit() | reg4.GetBit();
2843 const CPURegister& reg4) {
2847 const CPURegister regs[] = {reg1, reg2, reg3, reg4};