Cross Reference: /external/vixl/src/aarch64/simulator-aarch64.cc

Lines Matching refs:GetRn
1021   const Instruction* target = Instruction::Cast(ReadXRegister(instr->GetRn()));
1095                                           instr->GetRn(),
1105                                           instr->GetRn(),
1162                          ReadRegister(reg_size, instr->GetRn()),
1192   int64_t op1 = ReadRegister(reg_size, instr->GetRn());
1245   int64_t op1 = ReadRegister(reg_size, instr->GetRn());
1300   uintptr_t address = AddressModeHelper(instr->GetRn(), offset, addrmode);
1434   uintptr_t address = AddressModeHelper(instr->GetRn(), offset, addrmode);
1555   unsigned rn = instr->GetRn();
1833   uint64_t new_val = ReadXRegister(instr->GetRn());
1864   unsigned src = instr->GetRn();
1944       int32_t rn = ReadWRegister(instr->GetRn());
1957       int64_t rn = ReadXRegister(instr->GetRn());
1970       uint32_t rn = static_cast<uint32_t>(ReadWRegister(instr->GetRn()));
1981       uint64_t rn = static_cast<uint64_t>(ReadXRegister(instr->GetRn()));
2008       uint32_t acc = ReadRegister<uint32_t>(instr->GetRn());
2014       uint32_t acc = ReadRegister<uint32_t>(instr->GetRn());
2020       uint32_t acc = ReadRegister<uint32_t>(instr->GetRn());
2026       uint32_t acc = ReadRegister<uint32_t>(instr->GetRn());
2033       uint32_t acc = ReadRegister<uint32_t>(instr->GetRn());
2039       uint32_t acc = ReadRegister<uint32_t>(instr->GetRn());
2045       uint32_t acc = ReadRegister<uint32_t>(instr->GetRn());
2051       uint32_t acc = ReadRegister<uint32_t>(instr->GetRn());
2067                           ReadRegister(reg_size, instr->GetRn()),
2114   uint64_t rn_u32 = ReadRegister<uint32_t>(instr->GetRn());
2116   int64_t rn_s32 = ReadRegister<int32_t>(instr->GetRn());
2118   uint64_t rn_u64 = ReadXRegister(instr->GetRn());
2144       result = MultiplyHigh(ReadRegister<uint64_t>(instr->GetRn()),
2148       result = MultiplyHigh(ReadXRegister(instr->GetRn()),
2197   uint64_t src = ReadRegister(reg_size, instr->GetRn());
2217       (lsb == 0) ? 0 : ReadRegister<uint64_t>(reg_size, instr->GetRn())
2244   unsigned src = instr->GetRn();
2434   unsigned src = instr->GetRn();
2529       FPCompare(ReadSRegister(instr->GetRn()),
2537       FPCompare(ReadDRegister(instr->GetRn()),
2545       FPCompare(ReadSRegister(instr->GetRn()), 0.0f, trap);
2551       FPCompare(ReadDRegister(instr->GetRn()), 0.0, trap);
2569         FPCompare(ReadSRegister(instr->GetRn()),
2582         FPCompare(ReadDRegister(instr->GetRn()),
2601     selected = instr->GetRn();
2625   SimVRegister& rn = ReadVRegister(instr->GetRn());
2629   unsigned fn = instr->GetRn();
2717   SimVRegister& rn = ReadVRegister(instr->GetRn());
2769   unsigned fn = instr->GetRn();
2832   unsigned fn = instr->GetRn();
3004   SimVRegister& rn = ReadVRegister(instr->GetRn());
3253   SimVRegister& rn = ReadVRegister(instr->GetRn());
3515   SimVRegister& rn = ReadVRegister(instr->GetRn());
3685   SimVRegister& rn = ReadVRegister(instr->GetRn());
3745   SimVRegister& rn = ReadVRegister(instr->GetRn());
3875   SimVRegister& rn = ReadVRegister(instr->GetRn());
3885     ins_immediate(vf, rd, reg_index, ReadXRegister(instr->GetRn()));
3900     dup_immediate(vf, rd, ReadXRegister(instr->GetRn()));
3911   SimVRegister& rn = ReadVRegister(instr->GetRn());
3927   uint64_t addr_base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer);
4062     WriteXRegister(instr->GetRn(), addr_base);
4082   uint64_t addr = ReadXRegister(instr->GetRn(), Reg31IsStackPointer);
4310     WriteXRegister(instr->GetRn(),
4442   SimVRegister& rn = ReadVRegister(instr->GetRn());
4582   SimVRegister& rn = ReadVRegister(instr->GetRn());
4605   SimVRegister& rn = ReadVRegister(instr->GetRn());
4722   SimVRegister& rn = ReadVRegister(instr->GetRn());
4783   SimVRegister& rn = ReadVRegister(instr->GetRn());
4801   SimVRegister& rn = ReadVRegister(instr->GetRn());
4829   SimVRegister& rn = ReadVRegister(instr->GetRn());
4937   SimVRegister& rn = ReadVRegister(instr->GetRn());
5103   SimVRegister& rn = ReadVRegister(instr->GetRn());
5104   SimVRegister& rn2 = ReadVRegister((instr->GetRn() + 1) % kNumberOfVRegisters);
5105   SimVRegister& rn3 = ReadVRegister((instr->GetRn() + 2) % kNumberOfVRegisters);
5106   SimVRegister& rn4 = ReadVRegister((instr->GetRn() + 3) % kNumberOfVRegisters);
5145   SimVRegister& rn = ReadVRegister(instr->GetRn());