Searched defs:ARM (Results 1 - 25 of 27) sorted by relevance

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/external/libffi/linux-arm/
H A Dffi.h18 #define ARM macro
/external/libffi/linux-arm64/
H A Dffi.h18 #define ARM macro
/external/llvm/lib/Support/
H A DARMWinEH.cpp1 //===-- ARMWinEH.cpp - Windows on ARM EH Support Functions ------*- C++ -*-===//
14 namespace ARM { namespace in namespace:llvm
/external/llvm/lib/Target/ARM/
H A DARMAsmPrinter.h1 //===-- ARMAsmPrinter.h - ARM implementation of AsmPrinter ------*- C++ -*-===//
25 namespace ARM { namespace in namespace:llvm
64 return "ARM Assembly / Object Emitter";
113 // ARM/Darwin adds ISA to the DWARF info for each function.
121 return isThumb ? ARM::DW_ISA_ARM_thumb : ARM::DW_ISA_ARM_arm;
H A DARMISelLowering.h1 //===-- ARMISelLowering.h - ARM DAG Lowering Interface ----------*- C++ -*-===//
10 // This file defines the interfaces that ARM uses to lower LLVM code into a
29 // ARM Specific DAG Nodes
54 CMP, // ARM compare instructions.
55 CMN, // ARM CMN instructions.
56 CMPZ, // ARM compare that sets only Z flag.
57 CMPFP, // ARM VFP compare instruction, sets FPSCR.
58 CMPFPw0, // ARM VFP compare against zero instruction, sets FPSCR.
59 FMSTAT, // ARM fmstat instruction.
61 CMOV, // ARM conditiona
221 namespace ARM { namespace in namespace:llvm
689 namespace ARM { namespace in namespace:llvm
[all...]
/external/llvm/tools/llvm-readobj/
H A DARMWinEHPrinter.h1 //===--- ARMWinEHPrinter.h - Windows on ARM Unwind Information Printer ----===//
18 namespace ARM { namespace in namespace:llvm
H A DARMWinEHPrinter.cpp1 //===-- ARMWinEHPrinter.cpp - Windows on ARM EH Data Printer ----*- C++ -*-===//
10 // Windows on ARM uses a series of serialised data structures (RuntimeFunction)
49 // (c.f. ARM::WinEH::HeaderWords) and encodes most of the same information as
77 raw_ostream &operator<<(raw_ostream &OS, const ARM::WinEH::ReturnType &RT) {
79 case ARM::WinEH::ReturnType::RT_POP:
82 case ARM::WinEH::ReturnType::RT_B:
85 case ARM::WinEH::ReturnType::RT_BW:
88 case ARM::WinEH::ReturnType::RT_NoEpilogue:
115 namespace ARM { namespace in namespace:llvm
H A DARMEHABIPrinter.h1 //===--- ARMEHABIPrinter.h - ARM EHABI Unwind Information Printer ----------===//
26 namespace ARM { namespace in namespace:llvm
121 SW.startLine() << format("0x%02X ; reserved (ARM MOVrr)\n", Opcode);
419 /// ARM EHABI Section 6.2 - The generic model
431 /// ARM EHABI Section 6.3 - The ARM-defined compact model
486 /// ARM EHABI Section 5 - Index Table Entries
/external/lzma/Java/Tukaani/src/org/tukaani/xz/simple/
H A DARM.java2 * BCJ filter for little endian ARM instructions
13 public final class ARM implements SimpleFilter { class in inherits:SimpleFilter
17 public ARM(boolean isEncoder, int startPos) { method in class:ARM
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
H A DARMAsmPrinter.h1 //===-- ARMAsmPrinter.h - Print machine code to an ARM .s file ------------===//
10 // ARM Assembly printer class.
17 #include "ARM.h"
26 namespace ARM { namespace in namespace:llvm
54 return "ARM Assembly Printer";
105 // ARM/Darwin adds ISA to the DWARF info for each function.
109 llvm::ARM::DW_ISA_ARM_thumb : llvm::ARM::DW_ISA_ARM_arm;
H A DARMRelocations.h1 //===- ARMRelocations.h - ARM Code Relocations ------------------*- C++ -*-===//
10 // This file defines the ARM target-specific relocation types.
20 namespace ARM { namespace in namespace:llvm
38 // reloc_arm_machine_cp_entry - Relocation of a ARM machine constantpool
H A DARMISelLowering.h1 //===-- ARMISelLowering.h - ARM DAG Lowering Interface ----------*- C++ -*-===//
10 // This file defines the interfaces that ARM uses to lower LLVM code into a
30 // ARM Specific DAG Nodes
54 CMP, // ARM compare instructions.
55 CMPZ, // ARM compare that sets only Z flag.
56 CMPFP, // ARM VFP compare instruction, sets FPSCR.
57 CMPFPw0, // ARM VFP compare against zero instruction, sets FPSCR.
58 FMSTAT, // ARM fmstat instruction.
59 CMOV, // ARM conditional move instructions.
63 RBIT, // ARM bitrevers
229 namespace ARM { namespace in namespace:llvm
535 namespace ARM { namespace in namespace:llvm
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/external/valgrind/coregrind/
H A Dpub_core_basics.h80 } ARM; member in union:__anon29193::__anon29194
/external/google-breakpad/src/common/
H A Ddwarf_cfi_to_module.cc87 // Per ARM IHI 0040A, section 3.1
88 vector<string> DwarfCFIToModule::RegisterNames::ARM() { function in class:google_breakpad::DwarfCFIToModule::RegisterNames
108 // Per ARM IHI 0057A, section 3.1
/external/llvm/include/llvm/Support/
H A DARMEHABI.h1 //===--- ARMEHABI.h - ARM Exception Handling ABI ----------------*- C++ -*-===//
10 // This file defines the constants for the ARM unwind opcodes and exception
13 // The enumerations and constants in this file reflect the ARM EHABI
14 // Specification as published by ARM.
16 // Exception Handling ABI for the ARM Architecture r2.09 - November 30, 2012
26 namespace ARM { namespace in namespace:llvm
28 /// ARM exception handling table entry kinds
39 /// ARM-defined frame unwinding opcodes
118 /// ARM-defined Personality Routine Index
120 // To make the exception handling table become more compact, ARM define
[all...]
H A DTargetParser.h31 namespace ARM { namespace in namespace:llvm
143 } // namespace ARM
H A DARMWinEH.h1 //===-- llvm/Support/WinARMEH.h - Windows on ARM EH Constants ---*- C++ -*-===//
17 namespace ARM { namespace in namespace:llvm
/external/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMFixupKinds.h1 //===-- ARMFixupKinds.h - ARM Specific Fixup Entries ------------*- C++ -*-===//
16 namespace ARM { namespace in namespace:llvm
69 // The following fixups handle the ARM BL instructions. These can be
70 // conditionalised; however, the ARM ELF ABI requires a different relocation
78 // fixup_arm_uncondbl - Fixup for unconditional ARM BL instructions.
81 // fixup_arm_condbl - Fixup for ARM BL instructions with nontrivial
85 // fixup_arm_blx - Fixup for ARM BLX instructions.
/external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/
H A DARMFixupKinds.h1 //===-- ARM/ARMFixupKinds.h - ARM Specific Fixup Entries --------*- C++ -*-===//
16 namespace ARM { namespace in namespace:llvm
/external/swiftshader/third_party/llvm-subzero/include/llvm/Support/
H A DTargetParser.h31 namespace ARM { namespace in namespace:llvm
143 } // namespace ARM
/external/autotest/server/site_tests/firmware_Cr50DeviceState/
H A Dfirmware_Cr50DeviceState.py67 ARM = 'ARM ' variable in class:firmware_Cr50DeviceState
82 # ARM devices don't enter deep sleep in S3
83 ARM + 'S3' + DEEP_SLEEP_STEP_SUFFIX : [0, 0],
84 ARM + 'G3' + DEEP_SLEEP_STEP_SUFFIX : [1, 2],
243 ds_key = self.ARM if self.is_arm else ''
325 """Returns True if the DUT is an ARM device."""
/external/clang/include/clang/Basic/
H A DTargetBuiltins.h34 /// \brief ARM builtins
35 namespace ARM { namespace in namespace:clang
/external/swiftshader/src/Reactor/
H A DSubzeroReactor.cpp77 const static bool ARM; member in class:__anon22341::CPUID
120 const bool CPUID::ARM = CPUID::detectARM(); member in class:__anon22341::CPUID
123 const bool emulateMismatchedBitCast = CPUID::ARM;
245 if(CPUID::ARM)
2850 if(emulateIntrinsics || CPUID::ARM)
3126 if(emulateIntrinsics || CPUID::ARM)
3762 else if(CPUID::ARM)
3764 // ARM saturates the 32-bit integer result on overflow/undeflow.
4681 if(emulateIntrinsics || CPUID::ARM)
5924 if(emulateIntrinsics || CPUID::ARM)
[all...]
/external/v8/src/base/
H A Dcpu.h47 static const int ARM = 0x41; member in class:v8::base::final
55 // ARM-specific part codes
/external/llvm/include/llvm/MC/
H A DMCAsmInfo.h36 ARM, /// Windows NT (Windows on ARM) member in class:llvm::WinEH::EncodingType
37 CE, /// Windows CE ARM, PowerPC, SH3, SH4
48 ARM, /// ARM EHABI member in class:llvm::ExceptionHandling
549 ExceptionsType == ExceptionHandling::ARM || usesWindowsCFI());

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