| /external/swiftshader/src/Common/ |
| H A D | CPUID.hpp | 55 static bool CMOV; member in class:sw::CPUID
93 return CMOV && enableCMOV;
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| H A D | CPUID.cpp | 33 bool CPUID::CMOV = detectCMOV(); member in class:sw::CPUID
68 if(!CMOV)
192 return CMOV = (registers[3] & 0x00008000) != 0;
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| /external/tensorflow/tensorflow/core/platform/ |
| H A D | cpu_info.h | 47 CMOV = 7, enumerator in enum:tensorflow::port::CPUFeature
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| /external/mesa3d/src/gallium/drivers/swr/rasterizer/common/ |
| H A D | isa.hpp | 71 bool CMOV(void) { return CPU_Rep.f_1_EDX_[15]; } function in class:InstructionSet
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| H A D | ARMISelLowering.h | 59 CMOV, // ARM conditional move instructions. enumerator in enum:llvm::ARMISD::NodeType
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| H A D | X86ISelLowering.h | 110 CMOV, enumerator in enum:llvm::X86ISD::NodeType
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| /external/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 6763 CMOV = 0, enumerator in enum:X86Features
6795 .Case("cmov", X86Features::CMOV)
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| /external/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1138 case ARMISD::CMOV: return "ARMISD::CMOV";
3571 SDValue Overflow = DAG.getNode(ARMISD::CMOV, dl, VT, TVal, FVal,
3607 if (Cond.getOpcode() == ARMISD::CMOV && Cond.hasOneUse()) {
3711 SDValue Low = DAG.getNode(ARMISD::CMOV, dl, MVT::i32, FalseLow, TrueLow,
3713 SDValue High = DAG.getNode(ARMISD::CMOV, dl, MVT::i32, FalseHigh, TrueHigh,
3718 return DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, TrueVal, ARMcc, CCR,
4544 SDValue Lo = DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, TrueVal, ARMcc,
4578 SDValue Hi = DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, Tmp3, ARMcc,
5030 return DAG.getNode(ARMISD::CMOV, D
10813 PerformCMOVToBFICombine(SDNode *CMOV, SelectionDAG &DAG) const argument
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| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 13324 Hi = DAG.getNode(X86ISD::CMOV, dl, VT, Ops0);
13325 Lo = DAG.getNode(X86ISD::CMOV, dl, VT, Ops1);
13327 Lo = DAG.getNode(X86ISD::CMOV, dl, VT, Ops0);
13328 Hi = DAG.getNode(X86ISD::CMOV, dl, VT, Ops1);
15988 SDValue Cmov = DAG.getNode(X86ISD::CMOV, DL, VTs, T2, T1, CC, Cond);
15993 // X86ISD::CMOV means set the result (which is operand 1) to the RHS if
15997 return DAG.getNode(X86ISD::CMOV, DL, VTs, Ops);
18407 SDValue isValid = DAG.getNode(X86ISD::CMOV, dl,
19154 Op = DAG.getNode(X86ISD::CMOV, dl, OpVT, Ops);
19206 return DAG.getNode(X86ISD::CMOV, d
27383 SDValue CMOV = DAG.getNode(X86ISD::CMOV, DL, N->getVTList(), Ops); local
[all...] |