/external/clang/lib/Rewrite/ |
H A D | HTMLRewrite.cpp | 57 void html::HighlightRange(RewriteBuffer &RB, unsigned B, unsigned E, argument 61 RB.InsertTextAfter(B, StartTag); 62 RB.InsertTextBefore(E, EndTag); 76 RB.InsertTextBefore(LastNonWhiteSpace+1, EndTag); 95 RB.InsertTextAfter(i, StartTag); 115 RewriteBuffer &RB = R.getEditBuffer(FID); local 128 RB.ReplaceText(FilePos, 1, " "); 132 RB.ReplaceText(FilePos, 1, "<hr>"); 141 RB.ReplaceText(FilePos, 1, 145 RB 208 AddLineNumber(RewriteBuffer &RB, unsigned LineNo, unsigned B, unsigned E) argument 232 RewriteBuffer &RB = R.getEditBuffer(FID); local 358 RewriteBuffer &RB = R.getEditBuffer(FID); local [all...] |
H A D | Rewriter.cpp | 143 const RewriteBuffer &RB = I->second; local 144 EndOff = RB.getMappedOffset(EndOff, opts.IncludeInsertsAtEndOfRange); 145 StartOff = RB.getMappedOffset(StartOff, !opts.IncludeInsertsAtBeginOfRange); 195 const RewriteBuffer &RB = I->second; local 196 EndOff = RB.getMappedOffset(EndOff, true); 197 StartOff = RB.getMappedOffset(StartOff); 204 RewriteBuffer::iterator Start = RB.begin(); 381 RewriteBuffer &RB = getEditBuffer(FID); local 389 RB.InsertText(offs, indent, /*InsertAfter=*/false);
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/external/clang/test/Layout/ |
H A D | ms-x86-alias-avoidance-padding.cpp | 302 struct RB { char c; }; struct 306 struct RX0 : RB, RA {}; 307 struct RX1 : RA, RB {}; 309 struct RX3 : RA { RB a; }; 311 struct RX5 { RA a; RB b; }; 312 struct RX6 : virtual RV { RB a; }; 324 // CHECK-NEXT: 0 | struct RB (base) 337 // CHECK-X64-NEXT: 0 | struct RB (base) 350 // CHECK-NEXT: 0 | struct RB (base) 360 // CHECK-X64-NEXT: 0 | struct RB (bas [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/Disassembler/ |
H A D | MBlazeDisassembler.cpp | 527 unsigned RB = getRB(insn); local 536 if (RD == UNSUPPORTED || RA == UNSUPPORTED || RB == UNSUPPORTED) 539 instr.addOperand(MCOperand::CreateReg(RB)); 544 if (RD == UNSUPPORTED || RA == UNSUPPORTED || RB == UNSUPPORTED) 548 instr.addOperand(MCOperand::CreateReg(RB)); 595 if (RA == UNSUPPORTED || RB == UNSUPPORTED) 598 instr.addOperand(MCOperand::CreateReg(RB)); 609 if (RD == UNSUPPORTED || RB == UNSUPPORTED) 612 instr.addOperand(MCOperand::CreateReg(RB)); 623 if (RB [all...] |
/external/llvm/lib/CodeGen/GlobalISel/ |
H A D | RegisterBankInfo.cpp | 70 RegisterBank &RB = getRegBank(ID); local 73 DEBUG(dbgs() << "Add coverage for: " << RB << '\n'); 75 // Check if RB is underconstruction. 76 if (!RB.isValid()) 77 RB.ContainedRegClasses.resize(NbOfRegClasses); 78 else if (RB.covers(*TRI.getRegClass(RCId))) 79 // If RB already covers this register class, there is nothing 83 BitVector &Covered = RB.ContainedRegClasses; 89 unsigned &MaxSize = RB.Size;
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonGenInsert.cpp | 216 BitValueOrdering(const RegisterOrdering &RB) : BaseOrd(RB) {} argument 484 void buildOrderingBT(RegisterOrdering &RB, RegisterOrdering &RO) const; 578 void HexagonGenInsert::buildOrderingBT(RegisterOrdering &RB, 581 // ordering RB), and then sort it using the RegisterCell comparator. 582 BitValueOrdering BVO(RB); 586 for (RegisterOrdering::iterator I = RB.begin(), E = RB.end(); I != E; ++I)
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H A D | HexagonVLIWPacketizer.cpp | 221 MachineBasicBlock::iterator RB = Begin; local 222 while (RB != End && HII->isSchedulingBoundary(*RB, &MB, MF)) 223 ++RB; 226 MachineBasicBlock::iterator RE = RB; 232 // If RB == End, then RE == End. 233 if (RB != End) 234 Packetizer.PacketizeMIs(&MB, RB, RE);
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H A D | HexagonHardwareLoops.cpp | 1721 const RegisterBump &RB = I->second; local 1722 if (CmpRegs.count(RB.first)) { 1733 if (MO.isReg() && MO.getReg() == RB.first) { 1754 nonIndI->getOperand(2).getImm() == - RB.second) { 1775 int64_t V = RB.second; 1799 if (MO.isReg() && MO.getReg() == RB.first) {
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/external/skia/gm/ |
H A D | image.cpp | 93 RB = W * 4 + 8, enumerator in enum:ImageGM::__anon20512 97 fBufferSize = RB * H; 153 sk_sp<SkSurface> surf0(SkSurface::MakeRasterDirect(info, fBuffer, RB));
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/external/skqp/gm/ |
H A D | image.cpp | 92 RB = W * 4 + 8, enumerator in enum:ImageGM::__anon21182 96 fBufferSize = RB * H; 152 sk_sp<SkSurface> surf0(SkSurface::MakeRasterDirect(info, fBuffer, RB));
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/external/swiftshader/third_party/LLVM/include/llvm/MC/ |
H A D | MCRegisterInfo.h | 41 iterator RB, iterator RE, const unsigned char *Bits, 44 Allocatable(Allocable), RegsBegin(RB), RegsEnd(RE), RegSet(Bits), 39 MCRegisterClass(unsigned id, const char *name, unsigned RS, unsigned Al, int CC, bool Allocable, iterator RB, iterator RE, const unsigned char *Bits, unsigned NumBytes) argument
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/external/syslinux/com32/lua/src/ |
H A D | lvm.c | 514 #define RB(i) check_exp(getBMode(GET_OPCODE(i)) == OpArgR, base+GETARG_B(i)) macro 581 setobjs2s(L, ra, RB(i)); 612 Protect(luaV_gettable(L, RB(i), RKC(i), ra)); 636 StkId rb = RB(i); 659 TValue *rb = RB(i); 669 TValue *rb = RB(i); 674 Protect(luaV_objlen(L, ra, RB(i))); 724 TValue *rb = RB(i);
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/external/clang/include/clang/AST/ |
H A D | ExprObjC.h | 780 ObjCMethodDecl *setMethod, SourceLocation RB) 787 RBracket(RB), 796 void setRBracket(SourceLocation RB) { RBracket = RB; } argument 777 ObjCSubscriptRefExpr(Expr *base, Expr *key, QualType T, ExprValueKind VK, ExprObjectKind OK, ObjCMethodDecl *getMethod, ObjCMethodDecl *setMethod, SourceLocation RB) argument
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/external/clang/lib/AST/ |
H A D | Stmt.cpp | 283 SourceLocation LB, SourceLocation RB) 284 : Stmt(CompoundStmtClass), LBraceLoc(LB), RBraceLoc(RB) { 282 CompoundStmt(const ASTContext &C, ArrayRef<Stmt*> Stmts, SourceLocation LB, SourceLocation RB) argument
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/external/clang/lib/Basic/ |
H A D | SourceManager.cpp | 2100 const char *RB = getBuffer(ROffs.first)->getBufferIdentifier(); local 2102 bool RIsBuiltins = strcmp("<built-in>", RB) == 0; 2112 bool RIsAsm = strcmp("<inline asm>", RB) == 0; 2121 bool RIsScratch = strcmp("<scratch space>", RB) == 0;
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/external/clang/lib/Sema/ |
H A D | SemaExprObjC.cpp | 736 ExprResult Sema::BuildObjCSubscriptExpression(SourceLocation RB, Expr *BaseExpr, argument 763 getterMethod, setterMethod, RB);
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H A D | TreeTransform.h | 2839 ExprResult RebuildObjCSubscriptRefExpr(SourceLocation RB, argument 2843 return getSema().BuildObjCSubscriptExpression(RB, Base, Key,
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/external/valgrind/VEX/priv/ |
H A D | guest_ppc_toIR.c | 370 /* Extract RB (2nd source register) field, instr[15:11] */ 5508 * If (RA) >= (RB), or if an attempt is made to perform the division 20538 case 0x193: // mfvsrdd XT,RA,RB Move to VSR Double Doubleword 27352 UInt RB = IFIELD( theInstr, 11, 5 ); local 27362 UInt RB = IFIELD( theInstr, 11, 5 ); local [all...] |
/external/robolectric/v3/libs/ |
H A D | vtd-xml-2.11.jar | META-INF/ META-INF/MANIFEST.MF com/ com/ximpleware/ com/ximpleware/extended/ com/ximpleware/extended/parser/ ... |