Searched defs:REG_SEQUENCE (Results 1 - 1 of 1) sorted by relevance

/external/swiftshader/third_party/LLVM/include/llvm/Target/
H A DTargetOpcodes.h71 /// REG_SEQUENCE - This variadic instruction is used to form a register that
75 // the REG_SEQUENCE, while each subsequent pair names a vreg + subreg index
78 /// e.g. v1027 = REG_SEQUENCE v1024, 3, v1025, 4, v1026, 5
81 REG_SEQUENCE = 12, enumerator in enum:llvm::TargetOpcode::__anon22530

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