H A D | Arm64Assembler.cpp | 374 uint32_t amount; local 380 amount = mAddrMode.reg_imm_shift; 386 amount = 0; 397 case opADD: *mPC++ = A64_ADD_W(Rd, Rn, Rm, shift, amount); break; 398 case opAND: *mPC++ = A64_AND_W(Rd, Rn, Rm, shift, amount); break; 399 case opORR: *mPC++ = A64_ORR_W(Rd, Rn, Rm, shift, amount); break; 400 case opMVN: *mPC++ = A64_ORN_W(Rd, Rn, Rm, shift, amount); break; 401 case opSUB: *mPC++ = A64_SUB_W(Rd, Rn, Rm, shift, amount, s);break; 472 int amount = mAddrMode.reg_imm_shift; local 473 *mPC++ = A64_ADD_X_Wm_SXTW(Rd, Rn, Rm, amount); 478 int amount = 0; local 488 int amount = 0; local 1044 A64_ADD_X_Wm_SXTW(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t amount) argument 1055 A64_SUB_X_Wm_SXTW(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t amount) argument 1072 A64_ADD_X(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t shift, uint32_t amount) argument 1095 A64_ADD_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t shift, uint32_t amount) argument 1105 A64_SUB_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t shift, uint32_t amount, uint32_t setflag) argument 1126 A64_AND_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t shift, uint32_t amount) argument 1136 A64_ORR_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t shift, uint32_t amount) argument 1146 A64_ORN_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t shift, uint32_t amount) argument [all...] |