Searched defs:block_width (Results 1 - 16 of 16) sorted by relevance

/external/libvpx/libvpx/test/
H A Dvp9_subtract_test.cc42 const int block_width = 4 * num_4x4_blocks_wide_lookup[bsize]; local
45 vpx_memalign(16, sizeof(*diff) * block_width * block_height * 2));
47 vpx_memalign(16, block_width * block_height * 2));
49 vpx_memalign(16, block_width * block_height * 2));
53 for (int c = 0; c < block_width * 2; ++c) {
54 src[r * block_width * 2 + c] = rnd.Rand8();
55 pred[r * block_width * 2 + c] = rnd.Rand8();
59 GetParam()(block_height, block_width, diff, block_width, src, block_width,
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H A Dpp_filter_test.cc55 const int block_width = 16; local
59 Buffer<uint8_t> src_image = Buffer<uint8_t>(block_width, block_height, 2);
66 Buffer<uint8_t>(block_width, block_height, 8, 16, 8, 8);
70 reinterpret_cast<uint8_t *>(vpx_memalign(16, block_width));
71 (void)memset(flimits, 255, block_width);
84 dst_image.stride(), block_width, flimits, 16));
92 for (int j = 0; j < block_width; ++j) {
106 const int block_width = 136; local
112 Buffer<uint8_t>(block_width, block_height, 2, 2, 10, 2);
121 Buffer<uint8_t>(block_width, block_heigh
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/external/mesa3d/src/mesa/drivers/dri/r200/
H A Dradeon_tile.c477 void get_tile_size(mesa_format format, unsigned *block_width, unsigned *block_height) argument
482 *block_width = 1;
486 *block_width = 2;
490 *block_width = 4;
496 *block_width = 4;
501 *block_width = 8;
506 *block_width = 8;
/external/mesa3d/src/mesa/drivers/dri/radeon/
H A Dradeon_tile.c477 void get_tile_size(mesa_format format, unsigned *block_width, unsigned *block_height) argument
482 *block_width = 1;
486 *block_width = 2;
490 *block_width = 4;
496 *block_width = 4;
501 *block_width = 8;
506 *block_width = 8;
/external/mesa3d/src/gallium/drivers/svga/
H A Dsvga_format.c482 unsigned block_width, block_height, block_bytes; member in struct:format_cap
1907 unsigned *block_width,
1912 *block_width = format_cap_table[format].block_width;
1916 if (*block_width == 0)
1918 assert(*block_width);
1906 svga_format_size(SVGA3dSurfaceFormat format, unsigned *block_width, unsigned *block_height, unsigned *bytes_per_block) argument
/external/pdfium/third_party/libopenjpeg20/
H A Dsparse_array.c38 OPJ_UINT32 block_width; member in struct:opj_sparse_array_int32
47 OPJ_UINT32 block_width,
52 if (width == 0 || height == 0 || block_width == 0 || block_height == 0) {
55 if (block_width > ((OPJ_UINT32)~0U) / block_height / sizeof(OPJ_INT32)) {
63 sa->block_width = block_width;
65 sa->block_count_hor = opj_uint_ceildiv(width, block_width);
119 const OPJ_UINT32 block_width = sa->block_width; local
134 block_x = x0 / block_width;
45 opj_sparse_array_int32_create(OPJ_UINT32 width, OPJ_UINT32 height, OPJ_UINT32 block_width, OPJ_UINT32 block_height) argument
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/external/tensorflow/tensorflow/contrib/image/kernels/
H A Dsegmentation_ops.h102 EIGEN_DEVICE_FUNC EIGEN_ALWAYS_INLINE int64 block_width() const { function in class:tensorflow::functor::BlockedImageUnionFindFunctor
/external/gemmlowp/internal/
H A Dpack.h174 SideMap block(int start_width, int start_depth, int block_width, argument
177 assert(start_width + block_width <= width_);
181 return SideMap(data(start_width, start_depth), block_width, block_depth,
/external/mesa3d/src/gallium/drivers/ilo/core/
H A Dilo_image.h85 unsigned block_width; member in struct:ilo_image_info
157 unsigned block_width; member in struct:ilo_image
216 assert(pos_x % img->block_width == 0);
219 *mem_x = pos_x / img->block_width * img->block_size;
313 assert(w % img->block_width == 0);
316 return (w / img->block_width * img->block_size) *
/external/libvpx/libvpx/vp9/encoder/
H A Dvp9_temporal_filter.c99 unsigned int block_width,
115 for (j = 0; j < block_width; j++, k++) {
128 col < (int)block_width) {
130 frame2[idy * (int)block_width + idx];
161 byte += stride - block_width;
168 unsigned int block_width, unsigned int block_height, int strength,
178 for (j = 0; j < block_width; j++, k++) {
189 col < (int)block_width) {
191 frame2[idy * (int)block_width + idx];
220 byte += stride - block_width;
97 vp9_temporal_filter_apply_c(const uint8_t *frame1, unsigned int stride, const uint8_t *frame2, unsigned int block_width, unsigned int block_height, int strength, int filter_weight, uint32_t *accumulator, uint16_t *count) argument
166 vp9_highbd_temporal_filter_apply_c( const uint8_t *frame1_8, unsigned int stride, const uint8_t *frame2_8, unsigned int block_width, unsigned int block_height, int strength, int filter_weight, uint32_t *accumulator, uint16_t *count) argument
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H A Dvp9_encodeframe.c282 const int block_width = local
291 for (i = 0; i < block_width; ++i) xd->mi[j * mi_stride + i] = src_mi;
440 const int block_width = num_8x8_blocks_wide_lookup[bsize]; local
443 assert(block_height == block_width);
454 if (mi_col + block_width / 2 < cm->mi_cols &&
471 if (mi_col + block_width / 2 < cm->mi_cols &&
487 set_block_size(cpi, x, xd, mi_row, mi_col + block_width / 2, subsize);
492 if (mi_col + block_width / 2 < cm->mi_cols) {
1412 const int block_width = num_8x8_blocks_wide_lookup[BLOCK_64X64]; local
1414 if (mi_col + block_width /
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/external/mesa3d/src/amd/vulkan/
H A Dradv_image.c195 unsigned block_width, bool is_stencil,
200 unsigned pitch = base_level_info->nblk_x * block_width;
191 si_set_mutable_tex_desc_fields(struct radv_device *device, struct radv_image *image, const struct radeon_surf_level *base_level_info, unsigned base_level, unsigned first_level, unsigned block_width, bool is_stencil, uint32_t *state) argument
/external/tensorflow/tensorflow/contrib/lite/toco/graph_transformations/
H A Dpropagate_fixed_sizes.cc878 auto block_width = block_shape_data[1]; local
891 QCHECK_EQ(width_with_paddings % block_width, 0);
893 int output_width = width_with_paddings / block_width;
896 .copy_shape(Shape({input_shape.dims(0) * block_height * block_width,
927 auto block_width = block_shape_data[1]; local
942 QCHECK_EQ(input_shape.dims(0) % (block_height * block_width), 0);
945 int output_width = input_width * block_width;
948 .copy_shape(Shape({input_shape.dims(0) / (block_height * block_width),
/external/mesa3d/src/gallium/drivers/radeonsi/
H A Dsi_descriptors.c373 * \param block_width util_format_get_blockwidth()
380 unsigned block_width, bool is_stencil,
384 unsigned pitch = base_level_info->nblk_x * block_width;
450 rview->block_width,
377 si_set_mutable_tex_desc_fields(struct r600_texture *tex, const struct radeon_surf_level *base_level_info, unsigned base_level, unsigned first_level, unsigned block_width, bool is_stencil, uint32_t *state) argument
H A Dsi_pipe.h132 unsigned block_width; member in struct:si_sampler_view
/external/mesa3d/src/gallium/drivers/llvmpipe/
H A Dlp_state_fs.c866 unsigned block_width,
878 assert((block_width * block_height) % dst_count == 0);
911 unsigned block_width,
923 assert((block_width * block_height) % src_count == 0);
1706 const unsigned block_width = LP_RASTER_BLOCK_SIZE; local
1708 const unsigned block_size = block_width * block_height;
2194 dst_type.length = block_width;
2243 load_unswizzled_block(gallivm, color_ptr, stride, block_width, 1,
2251 load_unswizzled_block(gallivm, color_ptr, stride, block_width, block_height,
2354 store_unswizzled_block(gallivm, color_ptr, stride, block_width,
863 load_unswizzled_block(struct gallivm_state *gallivm, LLVMValueRef base_ptr, LLVMValueRef stride, unsigned block_width, unsigned block_height, LLVMValueRef* dst, struct lp_type dst_type, unsigned dst_count, unsigned dst_alignment) argument
908 store_unswizzled_block(struct gallivm_state *gallivm, LLVMValueRef base_ptr, LLVMValueRef stride, unsigned block_width, unsigned block_height, LLVMValueRef* src, struct lp_type src_type, unsigned src_count, unsigned src_alignment) argument
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