Searched defs:icache_flush_mode (Results 1 - 13 of 13) sorted by relevance

/external/v8/src/wasm/
H A Dwasm-code-specialization.cc108 WasmInstanceObject* instance, ICacheFlushMode icache_flush_mode) {
126 changed |= ApplyToWasmCode(wasm_function, icache_flush_mode);
162 ICacheFlushMode icache_flush_mode) {
193 icache_flush_mode);
199 icache_flush_mode);
205 old_globals_start, new_globals_start, icache_flush_mode);
237 UPDATE_WRITE_BARRIER, icache_flush_mode);
246 icache_flush_mode);
254 icache_flush_mode);
107 ApplyToWholeInstance( WasmInstanceObject* instance, ICacheFlushMode icache_flush_mode) argument
161 ApplyToWasmCode(Code* code, ICacheFlushMode icache_flush_mode) argument
/external/v8/src/arm/
H A Dassembler-arm-inl.h117 ICacheFlushMode icache_flush_mode) {
121 icache_flush_mode);
158 ICacheFlushMode icache_flush_mode) {
161 set_target_address(target, write_barrier_mode, icache_flush_mode);
180 ICacheFlushMode icache_flush_mode) {
209 ICacheFlushMode icache_flush_mode) {
544 ICacheFlushMode icache_flush_mode) {
567 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
587 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
600 ICacheFlushMode icache_flush_mode) {
115 set_target_object(Object* target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
156 set_target_runtime_entry(Address target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
178 set_target_cell(Cell* cell, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
208 set_code_age_stub(Code* stub, ICacheFlushMode icache_flush_mode) argument
542 set_target_address_at(Isolate* isolate, Address pc, Address constant_pool, Address target, ICacheFlushMode icache_flush_mode) argument
598 set_target_address_at(Isolate* isolate, Address pc, Code* code, Address target, ICacheFlushMode icache_flush_mode) argument
[all...]
/external/v8/src/mips/
H A Dassembler-mips-inl.h147 ICacheFlushMode icache_flush_mode) {
149 set_target_address_at(isolate, pc, constant_pool, target, icache_flush_mode);
216 ICacheFlushMode icache_flush_mode) {
220 icache_flush_mode);
273 ICacheFlushMode icache_flush_mode) {
276 set_target_address(target, write_barrier_mode, icache_flush_mode);
295 ICacheFlushMode icache_flush_mode) {
323 ICacheFlushMode icache_flush_mode) {
145 set_target_address_at(Isolate* isolate, Address pc, Code* code, Address target, ICacheFlushMode icache_flush_mode) argument
214 set_target_object(Object* target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
271 set_target_runtime_entry(Address target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
293 set_target_cell(Cell* cell, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
322 set_code_age_stub(Code* stub, ICacheFlushMode icache_flush_mode) argument
H A Dassembler-mips.cc3247 ICacheFlushMode icache_flush_mode) {
3278 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
3245 set_target_address_at(Isolate* isolate, Address pc, Address target, ICacheFlushMode icache_flush_mode) argument
/external/v8/src/mips64/
H A Dassembler-mips64-inl.h149 ICacheFlushMode icache_flush_mode) {
151 set_target_address_at(isolate, pc, constant_pool, target, icache_flush_mode);
204 ICacheFlushMode icache_flush_mode) {
208 icache_flush_mode);
255 ICacheFlushMode icache_flush_mode) {
258 set_target_address(target, write_barrier_mode, icache_flush_mode);
277 ICacheFlushMode icache_flush_mode) {
305 ICacheFlushMode icache_flush_mode) {
147 set_target_address_at(Isolate* isolate, Address pc, Code* code, Address target, ICacheFlushMode icache_flush_mode) argument
202 set_target_object(Object* target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
253 set_target_runtime_entry(Address target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
275 set_target_cell(Cell* cell, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
304 set_code_age_stub(Code* stub, ICacheFlushMode icache_flush_mode) argument
H A Dassembler-mips64.cc3503 ICacheFlushMode icache_flush_mode) {
3533 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
3501 set_target_address_at(Isolate* isolate, Address pc, Address target, ICacheFlushMode icache_flush_mode) argument
/external/v8/src/s390/
H A Dassembler-s390-inl.h129 ICacheFlushMode icache_flush_mode) {
131 set_target_address_at(isolate, pc, constant_pool, target, icache_flush_mode);
172 ICacheFlushMode icache_flush_mode) {
176 icache_flush_mode);
197 ICacheFlushMode icache_flush_mode) {
200 set_target_address(target, write_barrier_mode, icache_flush_mode);
215 ICacheFlushMode icache_flush_mode) {
260 ICacheFlushMode icache_flush_mode) {
264 icache_flush_mode);
508 ICacheFlushMode icache_flush_mode) {
127 set_target_address_at(Isolate* isolate, Address pc, Code* code, Address target, ICacheFlushMode icache_flush_mode) argument
170 set_target_object(Object* target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
195 set_target_runtime_entry(Address target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
214 set_target_cell(Cell* cell, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
259 set_code_age_stub(Code* stub, ICacheFlushMode icache_flush_mode) argument
506 set_target_address_at(Isolate* isolate, Address pc, Address constant_pool, Address target, ICacheFlushMode icache_flush_mode) argument
[all...]
/external/v8/src/ia32/
H A Dassembler-ia32-inl.h119 ICacheFlushMode icache_flush_mode) {
122 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
161 ICacheFlushMode icache_flush_mode) {
164 set_target_address(target, write_barrier_mode, icache_flush_mode);
184 ICacheFlushMode icache_flush_mode) {
189 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
215 ICacheFlushMode icache_flush_mode) {
219 isolate_, pc_ + 1, host_, stub->instruction_start(), icache_flush_mode);
442 ICacheFlushMode icache_flush_mode) {
445 if (icache_flush_mode !
117 set_target_object(Object* target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
159 set_target_runtime_entry(Address target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
182 set_target_cell(Cell* cell, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
214 set_code_age_stub(Code* stub, ICacheFlushMode icache_flush_mode) argument
440 set_target_address_at(Isolate* isolate, Address pc, Address constant_pool, Address target, ICacheFlushMode icache_flush_mode) argument
455 set_target_address_at(Isolate* isolate, Address pc, Code* code, Address target, ICacheFlushMode icache_flush_mode) argument
[all...]
/external/v8/src/ppc/
H A Dassembler-ppc-inl.h141 ICacheFlushMode icache_flush_mode) {
143 set_target_address_at(isolate, pc, constant_pool, target, icache_flush_mode);
193 ICacheFlushMode icache_flush_mode) {
197 icache_flush_mode);
221 ICacheFlushMode icache_flush_mode) {
224 set_target_address(target, write_barrier_mode, icache_flush_mode);
242 ICacheFlushMode icache_flush_mode) {
284 ICacheFlushMode icache_flush_mode) {
288 icache_flush_mode);
624 ICacheFlushMode icache_flush_mode) {
139 set_target_address_at(Isolate* isolate, Address pc, Code* code, Address target, ICacheFlushMode icache_flush_mode) argument
191 set_target_object(Object* target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
219 set_target_runtime_entry(Address target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
241 set_target_cell(Cell* cell, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
283 set_code_age_stub(Code* stub, ICacheFlushMode icache_flush_mode) argument
622 set_target_address_at(Isolate* isolate, Address pc, Address constant_pool, Address target, ICacheFlushMode icache_flush_mode) argument
[all...]
/external/v8/src/x64/
H A Dassembler-x64-inl.h282 ICacheFlushMode icache_flush_mode) {
284 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
296 ICacheFlushMode icache_flush_mode) {
298 set_target_address_at(isolate, pc, constant_pool, target, icache_flush_mode);
409 ICacheFlushMode icache_flush_mode) {
412 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
433 ICacheFlushMode icache_flush_mode) {
436 set_target_address(target, write_barrier_mode, icache_flush_mode);
456 ICacheFlushMode icache_flush_mode) {
460 if (icache_flush_mode !
280 set_target_address_at(Isolate* isolate, Address pc, Address constant_pool, Address target, ICacheFlushMode icache_flush_mode) argument
294 set_target_address_at(Isolate* isolate, Address pc, Code* code, Address target, ICacheFlushMode icache_flush_mode) argument
407 set_target_object(Object* target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
431 set_target_runtime_entry(Address target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
454 set_target_cell(Cell* cell, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
500 set_code_age_stub(Code* stub, ICacheFlushMode icache_flush_mode) argument
[all...]
/external/v8/src/x87/
H A Dassembler-x87-inl.h119 ICacheFlushMode icache_flush_mode) {
122 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
161 ICacheFlushMode icache_flush_mode) {
164 set_target_address(target, write_barrier_mode, icache_flush_mode);
184 ICacheFlushMode icache_flush_mode) {
189 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
215 ICacheFlushMode icache_flush_mode) {
219 isolate_, pc_ + 1, host_, stub->instruction_start(), icache_flush_mode);
442 ICacheFlushMode icache_flush_mode) {
445 if (icache_flush_mode !
117 set_target_object(Object* target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
159 set_target_runtime_entry(Address target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
182 set_target_cell(Cell* cell, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
214 set_code_age_stub(Code* stub, ICacheFlushMode icache_flush_mode) argument
440 set_target_address_at(Isolate* isolate, Address pc, Address constant_pool, Address target, ICacheFlushMode icache_flush_mode) argument
455 set_target_address_at(Isolate* isolate, Address pc, Code* code, Address target, ICacheFlushMode icache_flush_mode) argument
[all...]
/external/v8/src/arm64/
H A Dassembler-arm64-inl.h650 ICacheFlushMode icache_flush_mode) {
665 ICacheFlushMode icache_flush_mode) {
667 set_target_address_at(isolate, pc, constant_pool, target, icache_flush_mode);
710 ICacheFlushMode icache_flush_mode) {
714 icache_flush_mode);
751 ICacheFlushMode icache_flush_mode) {
754 set_target_address(target, write_barrier_mode, icache_flush_mode);
774 ICacheFlushMode icache_flush_mode) {
798 ICacheFlushMode icache_flush_mode) {
648 set_target_address_at(Isolate* isolate, Address pc, Address constant_pool, Address target, ICacheFlushMode icache_flush_mode) argument
663 set_target_address_at(Isolate* isolate, Address pc, Code* code, Address target, ICacheFlushMode icache_flush_mode) argument
708 set_target_object(Object* target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
749 set_target_runtime_entry(Address target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
772 set_target_cell(Cell* cell, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
797 set_code_age_stub(Code* stub, ICacheFlushMode icache_flush_mode) argument
/external/v8/src/
H A Dassembler.cc311 Address old_base, Address new_base, ICacheFlushMode icache_flush_mode) {
317 unchecked_update_wasm_memory_reference(updated_reference, icache_flush_mode);
318 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
324 ICacheFlushMode icache_flush_mode) {
329 unchecked_update_wasm_size(updated_size_reference, icache_flush_mode);
330 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
336 Address old_base, Address new_base, ICacheFlushMode icache_flush_mode) {
344 unchecked_update_wasm_memory_reference(updated_reference, icache_flush_mode);
345 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
351 uint32_t old_size, uint32_t new_size, ICacheFlushMode icache_flush_mode) {
310 update_wasm_memory_reference( Address old_base, Address new_base, ICacheFlushMode icache_flush_mode) argument
323 update_wasm_memory_size(uint32_t old_size, uint32_t new_size, ICacheFlushMode icache_flush_mode) argument
335 update_wasm_global_reference( Address old_base, Address new_base, ICacheFlushMode icache_flush_mode) argument
350 update_wasm_function_table_size_reference( uint32_t old_size, uint32_t new_size, ICacheFlushMode icache_flush_mode) argument
362 set_target_address(Address target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
[all...]

Completed in 241 milliseconds