/external/mesa3d/src/gallium/drivers/vc4/ |
H A D | vc4_opt_small_immediates.c | 84 uint32_t imm = c->uniform_data[src.index]; local 85 uint32_t small_imm = qpu_encode_small_immediate(imm); 95 inst->src[i].index = imm;
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/external/capstone/bindings/python/capstone/ |
H A D | arm.py | 25 ('imm', ctypes.c_int32), 41 def imm(self): member in class:ArmOp 42 return self.value.imm
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H A D | mips.py | 17 ('imm', ctypes.c_int64), 28 def imm(self): member in class:MipsOp 29 return self.value.imm
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H A D | ppc.py | 24 ('imm', ctypes.c_int32), 36 def imm(self): member in class:PpcOp 37 return self.value.imm
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H A D | sparc.py | 18 ('imm', ctypes.c_int32), 29 def imm(self): member in class:SparcOp 30 return self.value.imm
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H A D | systemz.py | 19 ('imm', ctypes.c_int64), 30 def imm(self): member in class:SyszOp 31 return self.value.imm
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H A D | x86.py | 20 ('imm', ctypes.c_int64), 35 def imm(self): member in class:X86Op 36 return self.value.imm
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H A D | xcore.py | 19 ('imm', ctypes.c_int32), 30 def imm(self): member in class:XcoreOp 31 return self.value.imm
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H A D | arm64.py | 24 ('imm', ctypes.c_int64), 45 def imm(self): member in class:Arm64Op 46 return self.value.imm
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/external/mesa3d/src/gallium/auxiliary/gallivm/ |
H A D | lp_bld_bitarit.c | 224 lp_build_shl_imm(struct lp_build_context *bld, LLVMValueRef a, unsigned imm) argument 226 LLVMValueRef b = lp_build_const_int_vec(bld->gallivm, bld->type, imm); 227 assert(imm < bld->type.width); 237 lp_build_shr_imm(struct lp_build_context *bld, LLVMValueRef a, unsigned imm) argument 239 LLVMValueRef b = lp_build_const_int_vec(bld->gallivm, bld->type, imm); 240 assert(imm < bld->type.width);
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/external/v8/src/arm/ |
H A D | constants-arm.cc | 27 uint64_t imm = high16 << 48; local 29 memcpy(&d, &imm, 8);
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/external/v8/src/crankshaft/arm64/ |
H A D | delayed-masm-arm64-inl.h | 38 void DelayedMasm::Fmov(FPRegister fd, double imm) { argument 40 __ Fmov(fd, imm);
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/external/capstone/bindings/java/capstone/ |
H A D | Mips.java | 28 public long imm; field in class:Mips.OpValue 33 return Arrays.asList("reg", "imm", "mem");
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H A D | Ppc.java | 39 public int imm; field in class:Ppc.OpValue
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H A D | Sparc.java | 29 public int imm; field in class:Sparc.OpValue
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H A D | Systemz.java | 30 public long imm; field in class:Systemz.OpValue
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H A D | Xcore.java | 30 public int imm; field in class:Xcore.OpValue
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/external/pcre/dist2/src/sljit/ |
H A D | sljitNativeMIPS_32.c | 29 static sljit_s32 load_immediate(struct sljit_compiler *compiler, sljit_s32 dst_ar, sljit_sw imm) argument 31 if (!(imm & ~0xffff)) 32 return push_inst(compiler, ORI | SA(0) | TA(dst_ar) | IMM(imm), dst_ar); 34 if (imm < 0 && imm >= SIMM_MIN) 35 return push_inst(compiler, ADDIU | SA(0) | TA(dst_ar) | IMM(imm), dst_ar); 37 FAIL_IF(push_inst(compiler, LUI | TA(dst_ar) | IMM(imm >> 16), dst_ar)); 38 return (imm & 0xffff) ? push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(imm), dst_ar) : SLJIT_SUCCESS;
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H A D | sljitNativePPC_32.c | 29 static sljit_s32 load_immediate(struct sljit_compiler *compiler, sljit_s32 reg, sljit_sw imm) argument 31 if (imm <= SIMM_MAX && imm >= SIMM_MIN) 32 return push_inst(compiler, ADDI | D(reg) | A(0) | IMM(imm)); 34 if (!(imm & ~0xffff)) 35 return push_inst(compiler, ORI | S(TMP_ZERO) | A(reg) | IMM(imm)); 37 FAIL_IF(push_inst(compiler, ADDIS | D(reg) | A(0) | IMM(imm >> 16))); 38 return (imm & 0xffff) ? push_inst(compiler, ORI | S(reg) | A(reg) | IMM(imm)) : SLJIT_SUCCESS; 101 return push_inst(compiler, ADDI | D(dst) | A(src1) | compiler->imm); [all...] |
H A D | sljitNativeSPARC_32.c | 27 static sljit_s32 load_immediate(struct sljit_compiler *compiler, sljit_s32 dst, sljit_sw imm) argument 29 if (imm <= SIMM_MAX && imm >= SIMM_MIN) 30 return push_inst(compiler, OR | D(dst) | S1(0) | IMM(imm), DR(dst)); 32 FAIL_IF(push_inst(compiler, SETHI | D(dst) | ((imm >> 10) & 0x3fffff), DR(dst))); 33 return (imm & 0x3ff) ? push_inst(compiler, OR | D(dst) | S1(dst) | IMM_ARG | (imm & 0x3ff), DR(dst)) : SLJIT_SUCCESS;
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H A D | sljitNativeMIPS_64.c | 29 static sljit_s32 load_immediate(struct sljit_compiler *compiler, sljit_s32 dst_ar, sljit_sw imm) argument 37 if (!(imm & ~0xffff)) 38 return push_inst(compiler, ORI | SA(0) | TA(dst_ar) | IMM(imm), dst_ar); 40 if (imm < 0 && imm >= SIMM_MIN) 41 return push_inst(compiler, ADDIU | SA(0) | TA(dst_ar) | IMM(imm), dst_ar); 43 if (imm <= 0x7fffffffl && imm >= -0x80000000l) { 44 FAIL_IF(push_inst(compiler, LUI | TA(dst_ar) | IMM(imm >> 16), dst_ar)); 45 return (imm [all...] |
/external/mesa3d/src/gallium/auxiliary/tgsi/ |
H A D | tgsi_transform.c | 70 const struct tgsi_full_immediate *imm) 74 ti += tgsi_build_full_immediate(imm, 69 emit_immediate(struct tgsi_transform_context *ctx, const struct tgsi_full_immediate *imm) argument
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/external/mesa3d/src/gallium/drivers/ilo/core/ |
H A D | ilo_builder_render.h | 81 uint64_t imm) 145 assert(!imm); 159 dw[4] = (uint32_t) imm; 160 dw[5] = (uint32_t) (imm >> 32); 171 dw[3] = (uint32_t) imm; 172 dw[4] = (uint32_t) (imm >> 32); 79 gen6_PIPE_CONTROL(struct ilo_builder *builder, uint32_t dw1, struct intel_bo *bo, uint32_t bo_offset, uint64_t imm) argument
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/external/mesa3d/src/gallium/drivers/r300/ |
H A D | r300_tgsi_to_rc.c | 276 struct tgsi_full_immediate * imm, 285 if (imm->u[i].Float == 0.0f) { 287 } else if (imm->u[i].Float == 0.5f && ttr->use_half_swizzles) { 289 } else if (imm->u[i].Float == 1.0f) { 305 constant.u.Immediate[i] = imm->u[i].Float; 275 handle_immediate(struct tgsi_to_rc * ttr, struct tgsi_full_immediate * imm, unsigned index) argument
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H A D | r300_vs.c | 186 struct ureg_src imm; local 192 imm = ureg_imm4f(ureg, 0, 0, 0, 1); 194 ureg_MOV(ureg, dst, imm);
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