/external/vixl/src/aarch32/ |
H A D | instructions-aarch32.cc | 629 uint32_t imm8 = imm >> (24 - shift); local 631 if ((imm8 <= 0xff) && ((imm8 & 0x80) != 0) && (overflow == 0)) { 632 SetEncodingValue(((shift + 8) << 7) | (imm8 & 0x7F)); 686 uint32_t imm8 = (imm << rot) | (imm >> (32 - rot)); local 687 if (imm8 <= 0xff) { 688 SetEncodingValue((rot << 7) | imm8);
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H A D | macro-assembler-aarch32.cc | 1259 uint8_t imm8 = imm & 0xff; local 1262 if ((imm & 0xff) != imm8) return false;
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H A D | operands-aarch32.h | 566 static float Decode(uint32_t imm8, const FloatType<float>&) { argument 567 return VFP::Imm8ToFP32(imm8); 570 static double Decode(uint32_t imm8, const FloatType<double>&) { argument 571 return VFP::Imm8ToFP64(imm8); 639 // - an immediate constant, such as <imm8>, <imm12>
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/external/valgrind/VEX/priv/ |
H A D | guest_generic_x87.c | 775 imm8 is the original immediate from the instruction. isSTRM 779 If the given imm8 case can be handled, the return value is True. 788 UInt imm8, Bool isxSTRM ) 790 vassert(imm8 < 0x80); 794 /* Explicitly reject any imm8 values that haven't been validated, 797 switch (imm8) { 813 UInt fmt = (imm8 >> 0) & 3; // imm8[1:0] data format 814 UInt agg = (imm8 >> 2) & 3; // imm8[ 784 compute_PCMPxSTRx( V128* resV, UInt* resOSZACP, V128* argLV, V128* argRV, UInt zmaskL, UInt zmaskR, UInt imm8, Bool isxSTRM ) argument 1041 compute_PCMPxSTRx_wide( V128* resV, UInt* resOSZACP, V128* argLV, V128* argRV, UInt zmaskL, UInt zmaskR, UInt imm8, Bool isxSTRM ) argument [all...] |
H A D | guest_amd64_helpers.c | 3768 UInt imm8 = imm_and_return_control_bit & 7; local 3770 UInt srcOffsL = imm8 & 3; /* src offs in 32-bit (L) chunks */ 3771 UInt dstOffsL = (imm8 >> 2) & 1; /* dst offs in ditto chunks */ 3865 opc_and_imm contains (4th byte of opcode << 8) | the-imm8-byte so 3903 HWord imm8 = opc4_and_imm & 0xFF; local 3907 HWord wide = (imm8 & 1); 3948 zmaskL, zmaskR, imm8, (Bool)isxSTRM 3972 zmaskL, zmaskR, imm8, (Bool)isxSTRM 3976 // front end shouldn't pass us any imm8 variants we can't 4302 HWord imm8, 4300 amd64g_dirtyhelper_AESKEYGENASSIST( VexGuestAMD64State* gst, HWord imm8, HWord gstOffL, HWord gstOffR ) argument [all...] |
H A D | host_amd64_isel.c | 1952 /* Add64( Add64(expr1, Shl64(expr2, imm8)), simm32 ) */ 1966 const IRExpr* imm8 = mi.bindee[2]; local 1968 if (imm8->tag == Iex_Const 1969 && imm8->Iex.Const.con->tag == Ico_U8 1970 && imm8->Iex.Const.con->Ico.U8 < 4 1971 /* imm8 is OK, now check simm32 */ 1975 UInt shift = imm8->Iex.Const.con->Ico.U8;
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H A D | host_arm_defs.c | 423 ARMRI84* ARMRI84_I84 ( UShort imm8, UShort imm4 ) { argument 426 ri84->ARMri84.I84.imm8 = imm8; 428 vassert(imm8 >= 0 && imm8 <= 255); 442 vex_printf("0x%x", ROR32(ri84->ARMri84.I84.imm8, 533 ARMNImm* ARMNImm_TI ( UInt type, UInt imm8 ) { 536 i->imm8 = imm8; 542 ULong y, x = imm->imm8; [all...] |
/external/vixl/src/aarch64/ |
H A D | instructions-aarch64.cc | 183 float Instruction::Imm8ToFP32(uint32_t imm8) { argument 187 uint32_t bits = imm8; 200 double Instruction::Imm8ToFP64(uint32_t imm8) { argument 205 uint32_t bits = imm8;
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H A D | assembler-aarch64.h | 1769 void orr(const VRegister& vd, const int imm8, const int left_shift = 0); 1781 void bic(const VRegister& vd, const int imm8, const int left_shift = 0); 1809 const int imm8, 3030 static Instr ImmNEONabcdefgh(int imm8) { argument 3031 VIXL_ASSERT(IsUint8(imm8)); 3033 instr = ((imm8 >> 5) & 7) << ImmNEONabc_offset; 3034 instr |= (imm8 & 0x1f) << ImmNEONdefgh_offset; 3236 const int imm8, 3240 const int imm8,
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H A D | disasm-aarch64.cc | 4530 uint64_t imm8 = instr->GetImmNEONabcdefgh(); local 4531 AppendToOutput("#0x%" PRIx64, imm8); 4534 uint64_t imm8 = instr->GetImmNEONabcdefgh(); local 4537 if (imm8 & (1 << i)) {
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/external/capstone/arch/X86/ |
H A D | X86DisassemblerDecoder.c | 1902 uint8_t imm8; local 1922 if (consumeByte(insn, &imm8)) 1924 insn->immediates[insn->numImmediatesConsumed] = imm8;
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/external/llvm/lib/Target/X86/Disassembler/ |
H A D | X86DisassemblerDecoder.cpp | 1638 uint8_t imm8; local 1658 if (consumeByte(insn, &imm8)) 1660 insn->immediates[insn->numImmediatesConsumed] = imm8;
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/external/swiftshader/third_party/LLVM/lib/Target/X86/Disassembler/ |
H A D | X86DisassemblerDecoder.c | 1394 uint8_t imm8; local 1413 if (consumeByte(insn, &imm8)) 1415 insn->immediates[insn->numImmediatesConsumed] = imm8;
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/external/valgrind/none/tests/amd64/ |
H A D | pcmpstr64w.c | 188 imm8 is the original immediate from the instruction. isSTRM 192 If the given imm8 case can be handled, the return value is True. 201 UInt imm8, Bool isxSTRM ) 203 assert(imm8 < 0x80); 207 /* Explicitly reject any imm8 values that haven't been validated, 210 switch (imm8) { 220 UInt fmt = (imm8 >> 0) & 3; // imm8[1:0] data format 221 UInt agg = (imm8 >> 2) & 3; // imm8[ 197 pcmpXstrX_WRK_wide( V128* resV, UInt* resOSZACP, V128* argLV, V128* argRV, UInt zmaskL, UInt zmaskR, UInt imm8, Bool isxSTRM ) argument [all...] |
H A D | pcmpstr64.c | 183 imm8 is the original immediate from the instruction. isSTRM 187 If the given imm8 case can be handled, the return value is True. 196 UInt imm8, Bool isSTRM ) 198 assert(imm8 < 0x80); 202 /* Explicitly reject any imm8 values that haven't been validated, 205 switch (imm8) { 221 UInt fmt = (imm8 >> 0) & 3; // imm8[1:0] data format 222 UInt agg = (imm8 >> 2) & 3; // imm8[ 192 pcmpXstrX_WRK( V128* resV, UInt* resOSZACP, V128* argLV, V128* argRV, UInt zmaskL, UInt zmaskR, UInt imm8, Bool isSTRM ) argument [all...] |
/external/v8/src/ia32/ |
H A D | macro-assembler-ia32.h | 364 void ShlPair(Register high, Register low, uint8_t imm8); 366 void ShrPair(Register high, Register low, uint8_t imm8); 368 void SarPair(Register high, Register low, uint8_t imm8); 754 void Pextrd(Register dst, XMMRegister src, int8_t imm8); 755 void Pinsrd(XMMRegister dst, Register src, int8_t imm8) { argument 756 Pinsrd(dst, Operand(src), imm8); 758 void Pinsrd(XMMRegister dst, const Operand& src, int8_t imm8);
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H A D | disasm-ia32.cc | 627 int imm8 = -1; local 657 imm8 = 1; 659 imm8 = *(data + 1); 664 if (imm8 >= 0) { 665 AppendToBuffer(",%d", imm8); 1478 // shufps xmm, xmm/m128, imm8 1482 int8_t imm8 = static_cast<int8_t>(data[1]); local 1486 static_cast<int>(imm8)); 1504 int8_t imm8 = static_cast<int8_t>(data[1]); local 1507 NameOfCPURegister(regop), static_cast<int>(imm8)); 1708 int8_t imm8 = static_cast<int8_t>(data[1]); local 1716 int8_t imm8 = static_cast<int8_t>(data[1]); local 1726 int8_t imm8 = static_cast<int8_t>(data[1]); local 1736 int8_t imm8 = static_cast<int8_t>(data[1]); local 1746 int8_t imm8 = static_cast<int8_t>(data[1]); local 1817 int8_t imm8 = static_cast<int8_t>(data[1]); local 1860 int8_t imm8 = static_cast<int8_t>(data[1]); local 1869 int8_t imm8 = static_cast<int8_t>(data[1]); local [all...] |
H A D | assembler-ia32.cc | 808 void Assembler::cmpb(const Operand& op, Immediate imm8) { argument 809 DCHECK(imm8.is_int8() || imm8.is_uint8()); 817 emit_b(imm8); 1074 void Assembler::rcl(Register dst, uint8_t imm8) { argument 1076 DCHECK(is_uint5(imm8)); // illegal shift count 1077 if (imm8 == 1) { 1083 EMIT(imm8); 1088 void Assembler::rcr(Register dst, uint8_t imm8) { argument 1090 DCHECK(is_uint5(imm8)); // illega 1102 ror(const Operand& dst, uint8_t imm8) argument 1123 sar(const Operand& dst, uint8_t imm8) argument 1166 shl(const Operand& dst, uint8_t imm8) argument 1186 shr(const Operand& dst, uint8_t imm8) argument 1290 test_b(Register reg, Immediate imm8) argument 1308 test_b(const Operand& op, Immediate imm8) argument 2421 shufps(XMMRegister dst, XMMRegister src, byte imm8) argument 2532 extractps(Register dst, XMMRegister src, byte imm8) argument 2856 rorx(Register dst, const Operand& src, byte imm8) argument 2963 emit_arith_b(int op1, int op2, Register dst, int imm8) argument [all...] |
H A D | macro-assembler-ia32.cc | 2268 void MacroAssembler::Pextrd(Register dst, XMMRegister src, int8_t imm8) { argument 2269 if (imm8 == 0) { 2273 DCHECK_EQ(1, imm8); 2276 pextrd(dst, src, imm8); 2284 void MacroAssembler::Pinsrd(XMMRegister dst, const Operand& src, int8_t imm8) { argument 2285 DCHECK(imm8 == 0 || imm8 == 1); 2288 pinsrd(dst, src, imm8); 2292 if (imm8 == 1) { 2295 DCHECK_EQ(0, imm8); [all...] |
/external/v8/src/x87/ |
H A D | disasm-x87.cc | 563 int imm8 = -1; local 593 imm8 = 1; 595 imm8 = *(data + 1); 600 if (imm8 >= 0) { 601 AppendToBuffer(",%d", imm8); 1131 // shufps xmm, xmm/m128, imm8 1135 int8_t imm8 = static_cast<int8_t>(data[1]); local 1139 static_cast<int>(imm8)); 1157 int8_t imm8 = static_cast<int8_t>(data[1]); local 1160 NameOfCPURegister(regop), static_cast<int>(imm8)); 1361 int8_t imm8 = static_cast<int8_t>(data[1]); local 1371 int8_t imm8 = static_cast<int8_t>(data[1]); local 1381 int8_t imm8 = static_cast<int8_t>(data[1]); local 1391 int8_t imm8 = static_cast<int8_t>(data[1]); local 1462 int8_t imm8 = static_cast<int8_t>(data[1]); local 1491 int8_t imm8 = static_cast<int8_t>(data[1]); local [all...] |
H A D | assembler-x87.cc | 390 void Assembler::mov_b(const Operand& dst, int8_t imm8) { argument 394 EMIT(imm8); 679 void Assembler::cmpb(const Operand& op, Immediate imm8) { argument 680 DCHECK(imm8.is_int8() || imm8.is_uint8()); 688 emit_b(imm8); 945 void Assembler::rcl(Register dst, uint8_t imm8) { argument 947 DCHECK(is_uint5(imm8)); // illegal shift count 948 if (imm8 == 1) { 954 EMIT(imm8); 959 rcr(Register dst, uint8_t imm8) argument 973 ror(const Operand& dst, uint8_t imm8) argument 994 sar(const Operand& dst, uint8_t imm8) argument 1037 shl(const Operand& dst, uint8_t imm8) argument 1057 shr(const Operand& dst, uint8_t imm8) argument 1161 test_b(Register reg, Immediate imm8) argument 1179 test_b(const Operand& op, Immediate imm8) argument 2102 emit_arith_b(int op1, int op2, Register dst, int imm8) argument [all...] |
/external/mesa3d/src/gallium/drivers/swr/rasterizer/common/ |
H A D | simd16intrin.h | 290 INLINE simdscalar _simd16_extract_ps(simd16scalar a, int imm8) argument 292 switch (imm8) 302 INLINE simdscalari _simd16_extract_si(simd16scalari a, int imm8) argument 304 switch (imm8) 314 INLINE simd16scalar _simd16_insert_ps(simd16scalar a, simdscalar b, int imm8) argument 316 switch (imm8) 328 INLINE simd16scalari _simd16_insert_si(simd16scalari a, simdscalari b, int imm8) argument 330 switch (imm8) 553 template <int imm8> 558 result.lo = _simd_slli_epi32(a.lo, imm8); [all...] |
/external/mesa3d/src/gallium/drivers/swr/rasterizer/jitter/ |
H A D | builder_misc.cpp | 1588 Value *Builder::VEXTRACTI128(Value* a, Constant* imm8) argument 1594 return CALL(func, {a, imm8}); 1596 bool flag = !imm8->isZeroValue(); 1605 Value *Builder::VINSERTI128(Value* a, Value* b, Constant* imm8) argument 1611 return CALL(func, {a, b, imm8}); 1613 bool flag = !imm8->isZeroValue();
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/external/v8/src/x64/ |
H A D | disasm-x64.cc | 823 int imm8 = -1; local 825 imm8 = 1; 828 imm8 = *(data + count); 831 AppendToBuffer(", %d", imm8); 1658 AppendToBuffer("extractps "); // reg/m32, xmm, imm8 1670 // roundsd xmm, xmm/m64, imm8 1677 AppendToBuffer("pextrb "); // reg/m32, xmm, imm8 1683 AppendToBuffer("pextrw "); // reg/m32, xmm, imm8 1689 AppendToBuffer("pextrd "); // reg/m32, xmm, imm8 1695 AppendToBuffer("pinsrd "); // xmm, reg/m32, imm8 [all...] |
/external/llvm/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 1958 unsigned imm8 = fieldFromInstruction(Insn, 0, 8); local 1964 Inst.addOperand(MCOperand::createImm(imm8)); 1971 if (imm8 == 0x10 && pred != 0xe && ((FeatureBits[ARM::FeatureRAS]) != 0))
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