/art/compiler/utils/arm/ |
H A D | managed_register_arm.cc | 29 Register low = AsRegisterPairLow(); local 31 return ArmManagedRegister::FromCoreRegister(low).Overlaps(other) || 37 SRegister low = AsOverlappingDRegisterLow(); local 40 return (low == other_sreg) || (high == other_sreg); 54 int low; local 57 low = (r * 2) + kNumberOfCoreRegIds; // Return a SRegister. 60 low = (r - kNumberOfDRegIds) * 2; // Return a Register. 61 if (low > 6) { 63 low = 1; 66 return low; [all...] |
/art/compiler/utils/arm64/ |
H A D | managed_register_arm64.cc | 67 int low = RegNo(); local 69 low += kNumberOfXRegIds; 71 low += kNumberOfXRegIds + kNumberOfWRegIds + kNumberOfDRegIds; 73 return low;
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/art/compiler/utils/mips/ |
H A D | managed_register_mips.cc | 30 Register low = AsRegisterPairLow(); local 32 return MipsManagedRegister::FromCoreRegister(low).Overlaps(other) || 38 FRegister low = AsOverlappingDRegisterLow(); local 41 return (low == other_freg) || (high == other_freg); 55 int low; local 58 low = (r * 2) + kNumberOfCoreRegIds; // Return an FRegister. 61 low = (r - kNumberOfDRegIds) * 2 + 2; // Return a Register. 62 if (low >= 24) { 64 low = 5; 67 return low; [all...] |
H A D | assembler_mips.h | 545 // low then high. 861 uint32_t low = Low32Bits(value); local 872 if (low == 0) { 876 LoadConst32(reg, low); 895 if (high != low) {
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H A D | assembler_mips.cc | 2822 uint32_t low = Low32Bits(value); local 2824 LoadConst32(reg_lo, low); 2825 if (high != low) { 2842 uint32_t low = Low32Bits(value); local 2844 if (low == 0) { 2847 LoadConst32(temp, low); 2864 int16_t low = Low16Bits(value); local 2865 high += (low < 0) ? 1 : 0; // Account for sign extension in addiu. 2866 if (low != 0) { 2868 Addiu(rt, temp, low); 4619 int16_t low = offset & ((1 << low_len) - 1); // Isolate these bits. local [all...] |
/art/compiler/utils/x86/ |
H A D | managed_register_x86.cc | 42 Register low; member in struct:art::x86::RegisterPairDescriptor 48 #define REGISTER_PAIR_ENUMERATION(low, high) { low##_##high, low, high }, 68 Register low = AsRegisterPairLow(); local 70 return X86ManagedRegister::FromCpuRegister(low).Overlaps(other) || 85 return kRegisterPairs[r].low;
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/art/compiler/utils/x86_64/ |
H A D | managed_register_x86_64.cc | 41 Register low; member in struct:art::x86_64::RegisterPairDescriptor 47 #define REGISTER_PAIR_ENUMERATION(low, high) { low##_##high, low, high }, 63 Register low = AsRegisterPairLow().AsRegister(); local 65 return X86_64ManagedRegister::FromCpuRegister(low).Overlaps(other) || 80 return kRegisterPairs[r].low;
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/art/runtime/jdwp/ |
H A D | jdwp_request.cc | 180 uint64_t low = Read4BE(); local 181 return (high << 32) | low;
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/art/compiler/optimizing/ |
H A D | common_arm.h | 86 int reg_code = location.low(); 220 inline Location LocationFrom(const vixl::aarch32::Register& low, argument 222 return Location::RegisterPairLocation(low.GetCode(), high.GetCode()); 225 inline Location LocationFrom(const vixl::aarch32::SRegister& low, argument 227 return Location::FpuRegisterPairLocation(low.GetCode(), high.GetCode());
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H A D | intrinsics.h | 137 low(0), 147 // Value of java.lang.IntegerCache#low. 148 int32_t low; member in struct:art::IntrinsicVisitor::IntegerValueOfInfo
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H A D | locations.h | 137 static Location RegisterPairLocation(int low, int high) { argument 138 return Location(kRegisterPair, low << 16 | high); 141 static Location FpuRegisterPairLocation(int low, int high) { argument 142 return Location(kFpuRegisterPair, low << 16 | high); 170 int low() const { function in class:art::Location 195 return static_cast<T>(low()); 207 return static_cast<T>(low()); 222 return Location::RegisterLocation(low()); 224 return Location::FpuRegisterLocation(low());
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H A D | register_allocator.cc | 234 LiveInterval* low = interval->GetLowInterval()->SplitAt(position); local 235 new_interval->SetLowInterval(low); 236 low->SetHighInterval(new_interval);
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H A D | register_allocator_linear_scan.cc | 39 static bool IsLowOfUnalignedPairInterval(LiveInterval* low) { argument 40 return GetHighForLowRegister(low->GetRegister()) != low->GetHighInterval()->GetRegister(); 352 current->SetRegister(first.low()); 364 current->SetRegister(output.low()); 510 // Make sure a low interval is always with a high. 512 // Make sure a high interval is always with a low. 564 // Allocating the low part was unsucessful. The splitted interval for the high part 852 // 2) A pair interval whose high is not low + 1. 853 // 3) A pair interval whose low i [all...] |
H A D | induction_var_analysis.cc | 299 uint32_t low = d1; local 301 low = std::min(low, VisitDescendant(loop, input)); 305 if (low < d1) { 306 map_.find(instruction)->second.depth = low;
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H A D | code_generator.cc | 1288 int low = location.low(); local 1290 if (slow_path != nullptr && slow_path->IsFpuRegisterSaved(low)) { 1291 uint32_t offset = slow_path->GetStackOffsetOfFpuRegister(low); 1294 stack_map_stream->AddDexRegisterEntry(DexRegisterLocation::Kind::kInFpuRegister, low); 1309 int low = location.low(); local 1311 if (slow_path != nullptr && slow_path->IsCoreRegisterSaved(low)) { 1312 uint32_t offset = slow_path->GetStackOffsetOfCoreRegister(low); 1315 stack_map_stream->AddDexRegisterEntry(DexRegisterLocation::Kind::kInRegister, low); [all...] |
H A D | ssa_liveness_analysis.h | 834 void SetLowInterval(LiveInterval* low) { argument 836 high_or_low_interval_ = low; 1132 // If this interval needs a register pair, the high or low equivalent. 1133 // `is_high_interval_` tells whether this holds the low or the high.
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H A D | code_generator_arm_vixl.cc | 79 return ((location.low() & 1) == 0) && (location.low() + 1 == location.high()); 967 // Given the numeric representation, it's enough to check the low bit of the 1109 // Given the numeric representation, it's enough to check the low bit of the 1147 // offset ("long offset"), of which only the low part contains 1332 // UnsafeGet's offset location is a register pair, the low 2155 // If `out` is a low register, then the GenerateConditionGeneric() 2291 // For constants, we also check that the output is in one or two low registers, 4086 vixl32::Register low = LowRegisterFrom(in); local 4099 // out_d = unsigned-to-double(low) 4964 vixl32::Register low = LowRegisterFrom(first); local [all...] |
H A D | code_generator_mips.cc | 696 // offset ("long offset"), of which only the low part contains 874 // UnsafeGet's offset location is a register pair, the low 1152 // Use 2 temporary registers because we can't first swap the low 32 bits of an FPR and 1725 // A following instruction will add the sign-extended low half of the 32-bit 2146 uint32_t low = Low32Bits(value); local 2148 if (IsUint<16>(low)) { 2149 if (dst_low != lhs_low || low != 0) { 2150 __ Ori(dst_low, lhs_low, low); 2153 __ LoadConst32(TMP, low); 2161 if (high != low) { 2167 uint32_t low = Low32Bits(value); local 2188 uint32_t low = Low32Bits(value); local 2214 int32_t low = Low32Bits(value); local [all...] |
H A D | code_generator_x86.cc | 796 // UnsafeGet's offset location is a register pair, the low 1441 // decided using the low words. 1922 // Clear output register: setb only sets the low byte. 3250 Immediate low(low_value); 3257 __ imull(in1_hi, low); 3261 __ movl(eax, low); 3969 Register low = loc.AsRegisterPairLow<Register>(); local 3973 __ addl(low, low); 3976 // Shift by 32 is easy. High gets low, an 4008 Register low = loc.AsRegisterPairLow<Register>(); local 4040 Register low = loc.AsRegisterPairLow<Register>(); local 5889 __ movl(Address(ESP, destination.GetStackIndex()), low); local 5916 __ movl(Address(ESP, destination.GetStackIndex()), low); local [all...] |
/art/runtime/native/ |
H A D | libcore_util_CharsetUtils.cc | 223 jchar low = (i + 1 != end) ? string->CharAt(i + 1) : 0; local 224 if (!U16_IS_SURROGATE_LEAD(high) || !U16_IS_SURROGATE_TRAIL(low)) { 230 // Now we know we have a *valid* surrogate pair, we can consume the low surrogate. 232 ch = U16_GET_SUPPLEMENTARY(high, low);
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H A D | java_lang_Class.cc | 349 size_t low = 0; local 356 while (low < high) { 357 auto mid = (low + high) / 2; 373 low = mid + 1;
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/art/test/530-checker-lse/src/ |
H A D | Main.java | 717 static int sumWithinRange(int[] array, final int low, final int high) { argument 720 return (i >= low) && (i <= high);
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/art/compiler/utils/mips64/ |
H A D | assembler_mips64.h | 1077 uint32_t low = Low32Bits(value); local 1079 if (low == 0) { 1083 LoadConst32(reg, low); 1104 if (high != low) {
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/art/libdexfile/dex/ |
H A D | dex_file_verifier.cc | 40 static bool IsValidOrNoTypeId(uint16_t low, uint16_t high) { argument 41 return (high == 0) || ((high == 0xffffU) && (low == 0xffffU)); 44 static bool IsValidTypeId(uint16_t low ATTRIBUTE_UNUSED, uint16_t high) { 2380 * practice the number of interfaces implemented by any given class is low.
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/art/runtime/mirror/ |
H A D | class.cc | 832 size_t low = 0; local 835 while (low < high) { 836 size_t mid = (low + high) / 2; 845 low = mid + 1;
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