/art/tools/dexfuzz/src/dexfuzz/rawdex/ |
H A D | OpcodeInfo.java | 27 public final Opcode opcode; field in class:OpcodeInfo 35 public OpcodeInfo(Opcode opcode, String name, int opcodeValue, AbstractFormat fmt) { argument 36 this.opcode = opcode;
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H A D | Instruction.java | 117 // Remember the offset, so after reading the opcode, we can read the whole 123 Log.errorAndQuit("Couldn't find OpcodeInfo for opcode with value: " 170 int opcode = (firstCodeWord & 0xff); 172 if (opcode == 0x0 && upperBits != 0x0) { 193 return opcode; 300 public static OpcodeInfo getOpcodeInfo(Opcode opcode) { argument 301 return opcode_map_by_enum.get(opcode); 308 private static void addOpcodeInfo(Opcode opcode, String name, argument 310 OpcodeInfo info = new OpcodeInfo(opcode, name, opcodeValue, fmt); 311 if (opcode [all...] |
H A D | Opcode.java | 277 public static boolean isBetween(Opcode opcode, Opcode opcode1, Opcode opcode2) { argument 278 return (opcode.ordinal() >= opcode1.ordinal() && opcode.ordinal() <= opcode2.ordinal());
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/art/tools/dexfuzz/src/dexfuzz/program/mutators/ |
H A D | InvokeChanger.java | 152 Opcode opcode = mInsn.insn.info.opcode; 153 if (isSimpleInvokeInst(opcode)) { 154 int index = opcode.ordinal() - Opcode.INVOKE_VIRTUAL.ordinal(); 157 } else if (isRangeInvokeInst(opcode)) { 158 int index = opcode.ordinal() - Opcode.INVOKE_VIRTUAL_RANGE.ordinal(); 162 return opcode; 165 private boolean isSimpleInvokeInst(Opcode opcode){ argument 166 return Opcode.isBetween(opcode, Opcode.INVOKE_VIRTUAL, Opcode.INVOKE_INTERFACE); 169 private boolean isRangeInvokeInst(Opcode opcode){ argument [all...] |
/art/compiler/dex/ |
H A D | inline_method_analyser.h | 86 InlineMethodOpcode opcode; member in struct:art::InlineMethod 106 static constexpr bool IsInstructionIGet(Instruction::Code opcode) { argument 107 return Instruction::IGET <= opcode && opcode <= Instruction::IGET_SHORT; 110 static constexpr bool IsInstructionIPut(Instruction::Code opcode) { argument 111 return Instruction::IPUT <= opcode && opcode <= Instruction::IPUT_SHORT; 114 static constexpr uint16_t IGetVariant(Instruction::Code opcode) { argument 115 return opcode - Instruction::IGET; 118 static constexpr uint16_t IPutVariant(Instruction::Code opcode) { argument [all...] |
H A D | inline_method_analyser.cc | 61 template <Instruction::Code opcode> bool Opcode(); 111 template <Instruction::Code opcode> 113 return instruction_->Opcode() == opcode; 394 result->opcode = kInlineOpConstructor; 453 Instruction::Code opcode = code_item->begin()->Opcode(); local 455 switch (opcode) { 458 result->opcode = kInlineOpNop; 533 result->opcode = kInlineOpReturnArg; 569 result->opcode = kInlineOpNonWideConst; 581 Instruction::Code opcode local 645 Instruction::Code opcode = instruction->Opcode(); local [all...] |
/art/libdexfile/dex/ |
H A D | dex_instruction_utils.h | 54 constexpr bool IsInstructionDirectConst(Instruction::Code opcode) { argument 55 return Instruction::CONST_4 <= opcode && opcode <= Instruction::CONST_WIDE_HIGH16; 58 constexpr bool IsInstructionConstWide(Instruction::Code opcode) { argument 59 return Instruction::CONST_WIDE_16 <= opcode && opcode <= Instruction::CONST_WIDE_HIGH16; 62 constexpr bool IsInstructionReturn(Instruction::Code opcode) { argument 63 return Instruction::RETURN_VOID <= opcode && opcode <= Instruction::RETURN_OBJECT; 66 constexpr bool IsInstructionInvoke(Instruction::Code opcode) { argument 71 IsInstructionQuickInvoke(Instruction::Code opcode) argument 76 IsInstructionInvokeStatic(Instruction::Code opcode) argument 80 IsInstructionGoto(Instruction::Code opcode) argument 84 IsInstructionIfCc(Instruction::Code opcode) argument 88 IsInstructionIfCcZ(Instruction::Code opcode) argument 137 IsInvokeInstructionRange(Instruction::Code opcode) argument 142 InvokeInstructionType(Instruction::Code opcode) argument [all...] |
H A D | dex_instruction.cc | 43 static constexpr int8_t InstructionSizeInCodeUnitsByOpcode(Instruction::Code opcode, argument 45 if (opcode == Instruction::Code::NOP) { 63 #define INSTRUCTION_DESCR(opcode, c, p, format, index, flags, eflags, vflags) \ 94 Code opcode = static_cast<Code>(insn & 0xFF); local 95 return FlagsOf(opcode) & Instruction::kContinue; 177 const char* opcode = kInstructionNames[Opcode()]; local 179 case k10x: os << opcode; break; local 180 case k12x: os << StringPrintf("%s v%d, v%d", opcode, VRegA_12x(), VRegB_12x()); break; 181 case k11n: os << StringPrintf("%s v%d, #%+d", opcode, VRegA_11n(), VRegB_11n()); break; 182 case k11x: os << StringPrintf("%s v%d", opcode, VRegA_11 383 os << opcode << " {"; local 395 os << opcode << " {"; local 404 os << opcode << " {"; local 413 os << opcode << " {"; local 421 os << opcode << " {"; local 472 os << opcode << " {"; local [all...] |
H A D | dex_file-inl.h | 290 uint8_t opcode = *stream++; local 291 switch (opcode) { 319 if (opcode == DBG_START_LOCAL_EXTENDED) { 375 address += (opcode - DBG_FIRST_SPECIAL) / DBG_LINE_RANGE; 436 uint8_t opcode = *stream++; local 437 switch (opcode) { 473 int adjopcode = opcode - DBG_FIRST_SPECIAL;
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H A D | dex_instruction.h | 84 #define INSTRUCTION_ENUM(opcode, cname, p, f, i, a, e, v) cname = (opcode), 151 kExperimental = 0x80, // is an experimental opcode 168 kStore = 0x0080000, // store opcode 169 kLoad = 0x0100000, // load opcode 281 // Returns the name of this instruction's opcode. 286 // Returns the name of the given opcode. 287 static const char* Name(Code opcode) { argument 288 return kInstructionNames[opcode]; 470 // Returns the opcode fiel 482 SetOpcode(Code opcode) argument 525 FormatOf(Code opcode) argument 530 IndexTypeOf(Code opcode) argument 535 FlagsOf(Code opcode) argument 540 VerifyFlagsOf(Code opcode) argument [all...] |
H A D | dex_file_verifier.cc | 1437 uint8_t opcode = *(ptr_++); local 1438 switch (opcode) { 1453 ErrorStringPrintf("Bad reg_num for opcode %x", opcode); 1476 ErrorStringPrintf("Bad reg_num for opcode %x", opcode); 1484 ErrorStringPrintf("Bad reg_num for opcode %x", opcode);
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/art/compiler/debug/dwarf/ |
H A D | debug_line_opcode_writer.h | 30 // * Choose the most compact encoding of a given opcode. 161 // Compact address and line opcode. 180 int opcode = kOpcodeBase + (delta_line - kLineBase) + local 182 if (opcode > UINT8_MAX) { 185 opcode -= (kLineRange * const_advance); 186 if (opcode <= UINT8_MAX) { 191 // Still use the opcode to do line advance and copy. 192 opcode = kOpcodeBase + (delta_line - kLineBase); 195 DCHECK(kOpcodeBase <= opcode && opcode < [all...] |
/art/compiler/utils/arm/ |
H A D | assembler_arm_vixl.cc | 115 bool ArmVIXLAssembler::ShifterOperandCanHold(Opcode opcode, argument 118 switch (opcode) {
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/art/disassembler/ |
H A D | disassembler_mips.cc | 60 static const uint32_t kMsa = (30 << kOpcodeShift); // MSA major opcode. 526 std::string opcode; local 532 opcode = StringPrintf("op=%d fn=%d", op, function); 536 opcode = gMipsInstructions[i].name; 574 case 0: opcode += ".s"; break; 575 case 1: opcode += ".d"; break; 576 case 4: opcode += ".w"; break; 577 case 5: opcode += ".l"; break; 578 case 6: opcode += ".ps"; break; 579 default: opcode [all...] |
/art/runtime/arch/x86/ |
H A D | fault_handler_x86.cc | 112 uint8_t opcode = *pc; local 124 switch (opcode) { 145 opcode = *pc; 155 if (x86_64 && opcode >= 0x40 && opcode <= 0x4f) { 156 opcode = *pc; 160 if (opcode == 0x0f) { 161 // Two byte opcode 163 opcode = *pc; 170 switch (opcode) { [all...] |
/art/dexlayout/ |
H A D | compact_dex_writer.cc | 177 const Instruction::Code opcode = it->Opcode(); local 179 if (opcode == Instruction::FILL_ARRAY_DATA || 180 opcode == Instruction::PACKED_SWITCH || 181 opcode == Instruction::SPARSE_SWITCH) {
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H A D | dex_ir.cc | 54 uint8_t opcode = *stream++; local 55 switch (opcode) {
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/art/tools/titrace/ |
H A D | titrace.cc | 166 uint8_t opcode = instruction[0]; local 169 instruction_counter_[opcode].fetch_add(1u, std::memory_order_relaxed);
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/art/compiler/optimizing/ |
H A D | instruction_builder.cc | 803 static InvokeType GetInvokeTypeFromOpCode(Instruction::Code opcode) { argument 804 switch (opcode) { 823 LOG(FATAL) << "Unexpected invoke opcode: " << opcode;
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H A D | code_generator_arm_vixl.cc | 5634 Opcode opcode) { 5637 CanEncodeConstantAsImmediate(constant->AsConstant(), opcode)) { 5646 Opcode opcode, 5649 if (assembler->ShifterOperandCanHold(opcode, value, flags_update)) { 5654 switch (opcode) { 5670 return opcode == AND && IsPowerOfTwo(value + 1); 5673 bool LocationsBuilderARMVIXL::CanEncodeConstantAsImmediate(HConstant* input_cst, Opcode opcode) { argument 5676 Opcode high_opcode = opcode; 5678 switch (opcode) { 5682 opcode 5633 ArmEncodableConstantOrRegister(HInstruction* constant, Opcode opcode) argument 5643 CanEncode32BitConstantAsImmediate( CodeGeneratorARMVIXL* codegen, uint32_t value, Opcode opcode, vixl32::FlagsUpdate flags_update = vixl32::FlagsUpdate::DontCare) argument 7943 HandleBitwiseOperation(HBinaryOperation* instruction, Opcode opcode) argument [all...] |
/art/runtime/verifier/ |
H A D | method_verifier.cc | 923 Instruction::Code opcode = it->Opcode(); local 924 switch (opcode) { 1165 Fail(VERIFY_ERROR_BAD_CLASS_HARD) << "unexpected opcode " << inst->Name(); 1170 Fail(VERIFY_ERROR_BAD_CLASS_HARD) << "opcode only expected at runtime " << inst->Name(); 1328 // Make sure the array-data is marked as an opcode. This ensures that it was reached when 1440 // Make sure the switch data is marked as an opcode. This ensures that it was reached when 1943 Instruction::Code opcode = ret_inst->Opcode(); local 1945 switch (opcode) { 1961 LOG(FATAL) << "Unknown return opcode " << opcode; [all...] |
/art/compiler/utils/mips/ |
H A D | assembler_mips.cc | 255 uint32_t MipsAssembler::EmitR(int opcode, argument 264 uint32_t encoding = static_cast<uint32_t>(opcode) << kOpcodeShift | 274 uint32_t MipsAssembler::EmitI(int opcode, Register rs, Register rt, uint16_t imm) { argument 277 uint32_t encoding = static_cast<uint32_t>(opcode) << kOpcodeShift | 285 uint32_t MipsAssembler::EmitI21(int opcode, Register rs, uint32_t imm21) { argument 288 uint32_t encoding = static_cast<uint32_t>(opcode) << kOpcodeShift | 295 uint32_t MipsAssembler::EmitI26(int opcode, uint32_t imm26) { argument 297 uint32_t encoding = static_cast<uint32_t>(opcode) << kOpcodeShift | imm26; 302 uint32_t MipsAssembler::EmitFR(int opcode, argument 311 uint32_t encoding = static_cast<uint32_t>(opcode) << kOpcodeShif 321 EmitFI(int opcode, int fmt, FRegister ft, uint16_t imm) argument [all...] |
/art/compiler/utils/mips64/ |
H A D | assembler_mips64.cc | 99 void Mips64Assembler::EmitR(int opcode, GpuRegister rs, GpuRegister rt, GpuRegister rd, argument 104 uint32_t encoding = static_cast<uint32_t>(opcode) << kOpcodeShift | 113 void Mips64Assembler::EmitRsd(int opcode, GpuRegister rs, GpuRegister rd, argument 117 uint32_t encoding = static_cast<uint32_t>(opcode) << kOpcodeShift | 126 void Mips64Assembler::EmitRtd(int opcode, GpuRegister rt, GpuRegister rd, argument 130 uint32_t encoding = static_cast<uint32_t>(opcode) << kOpcodeShift | 139 void Mips64Assembler::EmitI(int opcode, GpuRegister rs, GpuRegister rt, uint16_t imm) { argument 142 uint32_t encoding = static_cast<uint32_t>(opcode) << kOpcodeShift | 149 void Mips64Assembler::EmitI21(int opcode, GpuRegister rs, uint32_t imm21) { argument 152 uint32_t encoding = static_cast<uint32_t>(opcode) << kOpcodeShif 158 EmitI26(int opcode, uint32_t imm26) argument 164 EmitFR(int opcode, int fmt, FpuRegister ft, FpuRegister fs, FpuRegister fd, int funct) argument 178 EmitFI(int opcode, int fmt, FpuRegister ft, uint16_t imm) argument [all...] |