| /art/compiler/utils/arm/ |
| H A D | assembler_arm_vixl.h | 77 void (func_name)(vixl32::Register rd, vixl32::Register rn, const vixl32::Operand& operand) { \
78 MacroAssembler::func_name(vixl32::DontCare, rd, rn, operand); \
102 void (func_name)(vixl32::Register rd, const vixl32::Operand& operand) { \
103 MacroAssembler::func_name(vixl32::DontCare, rd, operand); \
125 void Add(vixl32::Register rd, vixl32::Register rn, const vixl32::Operand& operand) { argument
126 if (rd.Is(rn) && operand.IsPlainRegister()) {
127 MacroAssembler::Add(rd, rn, operand);
129 MacroAssembler::Add(vixl32::DontCare, rd, rn, operand);
|
| /art/compiler/optimizing/ |
| H A D | loop_optimization.cc | 92 /*out*/ HInstruction** operand);
95 // Returns the promoted operand on success.
98 /*out*/ HInstruction** operand) {
108 *operand = instruction;
115 *operand = instruction;
128 *operand = instruction;
144 *operand = conv;
151 IsZeroExtensionAndGet(instruction->InputAt(0), type, /*out*/ operand);
160 // Returns the promoted operand on success.
163 /*out*/ HInstruction** operand) {
96 IsSignExtensionAndGet(HInstruction* instruction, DataType::Type type, HInstruction** operand) argument
161 IsZeroExtensionAndGet(HInstruction* instruction, DataType::Type type, HInstruction** operand) argument
[all...] |
| /art/compiler/utils/x86/ |
| H A D | assembler_x86.cc | 2296 void X86Assembler::shll(Register operand, Register shifter) { argument
2297 EmitGenericShift(4, Operand(operand), shifter);
2316 void X86Assembler::shrl(Register operand, Register shifter) { argument
2317 EmitGenericShift(5, Operand(operand), shifter);
2336 void X86Assembler::sarl(Register operand, Register shifter) { argument
2337 EmitGenericShift(7, Operand(operand), shifter);
2392 void X86Assembler::roll(Register operand, Register shifter) { argument
2393 EmitGenericShift(0, Operand(operand), shifter);
2402 void X86Assembler::rorl(Register operand, Register shifter) { argument
2403 EmitGenericShift(1, Operand(operand), shifte
2743 EmitOperand(int reg_or_opcode, const Operand& operand) argument
2772 EmitComplex(int reg_or_opcode, const Operand& operand, const Immediate& immediate, bool is_16_op) argument
2829 EmitGenericShift(int reg_or_opcode, const Operand& operand, const Immediate& imm) argument
2845 EmitGenericShift(int reg_or_opcode, const Operand& operand, Register shifter) argument
[all...] |
| /art/compiler/utils/x86_64/ |
| H A D | assembler_x86_64.cc | 1023 // Emit a REX.W prefix if the operand size is 64 bits.
1038 // Emit a REX.W prefix if the operand size is 64 bits.
1058 // Emit a REX.W prefix if the operand size is 64 bits.
1073 // Emit a REX.W prefix if the operand size is 64 bits.
1133 // Emit a REX.W prefix if the operand size is 64 bits.
1153 // Emit a REX.W prefix if the operand size is 64 bits.
2514 // W - 64-bit operand
2541 // W - 64-bit operand
2833 void X86_64Assembler::shll(CpuRegister operand, CpuRegister shifter) { argument
2834 EmitGenericShift(false, 4, operand, shifte
2838 shlq(CpuRegister operand, CpuRegister shifter) argument
2853 shrl(CpuRegister operand, CpuRegister shifter) argument
2858 shrq(CpuRegister operand, CpuRegister shifter) argument
2868 sarl(CpuRegister operand, CpuRegister shifter) argument
2878 sarq(CpuRegister operand, CpuRegister shifter) argument
2888 roll(CpuRegister operand, CpuRegister shifter) argument
2898 rorl(CpuRegister operand, CpuRegister shifter) argument
2908 rolq(CpuRegister operand, CpuRegister shifter) argument
2918 rorq(CpuRegister operand, CpuRegister shifter) argument
3380 EmitOperand(uint8_t reg_or_opcode, const Operand& operand) argument
3411 EmitComplex(uint8_t reg_or_opcode, const Operand& operand, const Immediate& immediate, bool is_16_op) argument
3490 EmitGenericShift(bool wide, int reg_or_opcode, CpuRegister operand, CpuRegister shifter) argument
3549 EmitOptionalRex32(const Operand& operand) argument
3556 EmitOptionalRex32(CpuRegister dst, const Operand& operand) argument
3566 EmitOptionalRex32(XmmRegister dst, const Operand& operand) argument
3584 EmitRex64(const Operand& operand) argument
3602 EmitRex64(CpuRegister dst, const Operand& operand) argument
3610 EmitRex64(XmmRegister dst, const Operand& operand) argument
3624 EmitOptionalByteRegNormalizingRex32(CpuRegister dst, const Operand& operand) argument
[all...] |