Searched defs:pad_cols (Results 1 - 18 of 18) sorted by relevance

/external/tensorflow/tensorflow/core/kernels/
H A Ddeep_conv2d.h76 int pad_cols; member in struct:tensorflow::Conv2DArgs
91 pad_cols(0),
H A Dpooling_ops_3d.h72 int64 pad_cols; member in struct:tensorflow::Pool3dParameters
H A Dextract_image_patches_op.cc87 int64 pad_rows = 0, pad_cols = 0; variable
93 padding_, &out_cols, &pad_cols));
H A Davgpooling_op.cc279 int64 out_height, out_width, pad_rows, pad_cols; variable
285 padding_, &out_width, &pad_cols));
293 col_stride, pad_rows, pad_cols](int64 start, int64 limit) {
314 pad_cols, &cindex, &csize));
513 int64 out_height, out_width, pad_rows, pad_cols; variable
519 padding_, &out_width, &pad_cols));
533 pad_cols, // pad_l
H A Ddepthwise_conv_op.h36 int pad_cols; member in struct:tensorflow::DepthwiseArgs
53 pad_cols(0),
222 const int64 in_c_start = out_c * args.stride - args.pad_cols;
H A Dops_util_test.cc71 int64 new_height, new_width, pad_rows, pad_cols; local
80 &pad_cols);
86 int64 new_height, new_width, pad_rows, pad_cols; local
95 &pad_cols);
100 EXPECT_EQ(pad_struct.output.pad_left, pad_cols);
H A Dpooling_ops_common.h69 int64 pad_cols; member in struct:tensorflow::PoolParameters
201 const int32 pad_cols = params.pad_cols;
224 const int32 wpad = w + pad_cols;
277 params.pad_rows, params.pad_cols,
448 const int32 pad_cols = params.pad_cols;
471 const int32 wpad = w + pad_cols;
560 const int wpad = w + params.pad_cols;
H A Dconv_ops_3d.cc186 int64 pad_planes = 0, pad_rows = 0, pad_cols = 0; local
196 pad_cols = std::max<int64>(
258 const bool cols_odd = (pad_cols % 2 != 0);
309 CHECK(pad_rows >= 0 && pad_cols >= 0 && pad_planes >= 0)
310 << "Negative paddings: (" << pad_rows << ", " << pad_cols << ", "
336 .set_zero_padding(DimIndex::X, pad_cols / 2)
384 {{pad_planes, pad_rows, pad_cols}},
H A Ddepthwise_conv_op.cc341 int64 out_rows = 0, out_cols = 0, pad_rows = 0, pad_cols = 0; variable
347 padding_, &out_cols, &pad_cols));
365 << ", pad_cols = " << pad_cols << ", output: [" << batch << ", "
394 args.pad_cols = pad_cols;
H A Dconv_ops_using_gemm.cc520 int64 out_rows = 0, out_cols = 0, pad_rows = 0, pad_cols = 0; variable
526 padding_, &out_cols, &pad_cols));
H A Dnn_ops_test.cc126 int64 out_rows = 0, out_cols = 0, pad_rows = 0, pad_cols = 0; local
130 &out_cols, &pad_cols));
520 int64 out_rows = 0, out_cols = 0, pad_rows = 0, pad_cols = 0; local
524 &out_cols, &pad_cols));
918 int64 out_height, out_width, pad_rows, pad_cols; local
922 &out_width, &pad_cols));
1106 int64 out_height, out_width, pad_rows, pad_cols; local
1110 &out_width, &pad_cols));
H A Dconv_ops.cc138 int filter_cols, int pad_rows, int pad_cols, int out_rows,
154 int filter_cols, int pad_rows, int pad_cols, int out_rows,
173 args.pad_cols = pad_cols;
195 int filter_cols, int pad_rows, int pad_cols, int out_rows,
209 int filter_cols, int pad_rows, int pad_cols, int out_rows,
227 desc.pad_w = pad_cols;
373 int64 out_rows = 0, out_cols = 0, pad_rows = 0, pad_cols = 0; variable
379 stride_cols, padding_, &out_cols, &pad_cols));
407 filter_rows, filter_cols, pad_rows, pad_cols, out_row
135 Run(OpKernelContext* ctx, const Tensor& input, const Tensor& filter, int batch, int input_rows, int input_cols, int in_depth, int filter_rows, int filter_cols, int pad_rows, int pad_cols, int out_rows, int , int , int , int , int , int , Tensor* , TensorFormat ) argument
151 Run(OpKernelContext* ctx, const Tensor& input, const Tensor& filter, int batch, int input_rows, int input_cols, int in_depth, int filter_rows, int filter_cols, int pad_rows, int pad_cols, int out_rows, int out_cols, int out_depth, int dilation_rows, int dilation_cols, int stride_rows, int stride_cols, Tensor* output, TensorFormat data_format) argument
192 Run(OpKernelContext* ctx, const Tensor& input, const Tensor& filter, int batch, int input_rows, int input_cols, int in_depth, int filter_rows, int filter_cols, int pad_rows, int pad_cols, int out_rows, int out_cols, int out_depth, int stride_rows, int stride_cols, int dilation_rows, int dilation_cols, Tensor* output, TensorFormat data_format) argument
206 Run(OpKernelContext* ctx, const Tensor& input, const Tensor& filter, int batch, int input_rows, int input_cols, int in_depth, int filter_rows, int filter_cols, int pad_rows, int pad_cols, int out_rows, int out_cols, int out_depth, int dilation_rows, int dilation_cols, int stride_rows, int stride_cols, Tensor* output, TensorFormat data_format) argument
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H A Dconv_ops_fused.cc824 int64 out_rows = 0, out_cols = 0, pad_rows = 0, pad_cols = 0; variable
830 padding_, &out_cols, &pad_cols));
H A Ddepthwise_conv_grad_op.cc112 int64 out_rows = 0, out_cols = 0, pad_rows = 0, pad_cols = 0; \
118 padding_, &out_cols, &pad_cols)); \
139 args.pad_cols = pad_cols; \
147 << ", pad_rows = " << pad_rows << ", pad_cols = " << pad_cols \
188 const int64 pad_cols = args.pad_cols; local
197 static_cast<int64>(0), (in_c - filter_cols + pad_cols + stride) / stride);
198 const int64 out_c_end = std::min(out_cols - 1, (in_c + pad_cols) / strid
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H A Dmkl_conv_ops.cc174 int64 out_rows = 0, out_cols = 0, pad_rows = 0, pad_cols = 0; variable
180 padding_, &out_cols, &pad_cols));
223 mkl_context.input_offset[0] = static_cast<int>(-pad_cols);
H A Dquantized_conv_ops.cc540 int64 out_rows = 0, out_cols = 0, pad_rows = 0, pad_cols = 0; variable
546 padding_, &out_cols, &pad_cols));
/external/tensorflow/tensorflow/core/kernels/neon/
H A Dneon_depthwise_conv_op.cc90 int64 out_rows = 0, out_cols = 0, pad_rows = 0, pad_cols = 0; variable
96 padding_, &out_cols, &pad_cols));
114 << ", pad_cols = " << pad_cols << ", output: [" << batch << ", "
137 bias_neon_dims, stride, pad_cols, pad_rows, depth_multiplier,
/external/tensorflow/tensorflow/contrib/fused_conv/kernels/
H A Dfused_conv2d_bias_activation_op.cc201 int64 output_rows = 0, output_cols = 0, pad_rows = 0, pad_cols = 0; variable
207 &output_cols, &pad_cols));

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