Searched defs:rm (Results 1 - 5 of 5) sorted by relevance

/art/compiler/utils/arm/
H A Dassembler_arm_vixl.h118 void Mul(vixl32::Register rd, vixl32::Register rn, vixl32::Register rm) { argument
119 MacroAssembler::Mul(vixl32::DontCare, rd, rn, rm);
/art/compiler/utils/x86/
H A Dassembler_x86.h59 Register rm() const { function in class:art::x86::Operand
815 inline void EmitRegisterOperand(int rm, int reg);
816 inline void EmitXmmRegisterOperand(int rm, XmmRegister reg);
820 void EmitOperand(int rm, const Operand& operand);
823 int rm, const Operand& operand, const Immediate& immediate, bool is_16_op = false);
828 void EmitGenericShift(int rm, const Operand& operand, const Immediate& imm);
829 void EmitGenericShift(int rm, const Operand& operand, Register shifter);
844 inline void X86Assembler::EmitRegisterOperand(int rm, int reg) { argument
845 CHECK_GE(rm, 0);
846 CHECK_LT(rm,
850 EmitXmmRegisterOperand(int rm, XmmRegister reg) argument
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/art/compiler/utils/x86_64/
H A Dassembler_x86_64.h67 Register rm() const { function in class:art::x86_64::Operand
85 return static_cast<CpuRegister>(rm() + ext);
902 void EmitRegisterOperand(uint8_t rm, uint8_t reg);
903 void EmitXmmRegisterOperand(uint8_t rm, XmmRegister reg);
907 void EmitOperand(uint8_t rm, const Operand& operand);
910 uint8_t rm, const Operand& operand, const Immediate& immediate, bool is_16_op = false);
915 void EmitGenericShift(bool wide, int rm, CpuRegister reg, const Immediate& imm);
916 void EmitGenericShift(bool wide, int rm, CpuRegister operand, CpuRegister shifter);
966 inline void X86_64Assembler::EmitRegisterOperand(uint8_t rm, uint8_t reg) { argument
967 CHECK_GE(rm,
972 EmitXmmRegisterOperand(uint8_t rm, XmmRegister reg) argument
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/art/disassembler/
H A Ddisassembler_x86.cc161 std::string DisassemblerX86::DumpAddress(uint8_t mod, uint8_t rm, uint8_t rex64, uint8_t rex_w, argument
167 if (mod == 0 && rm == 5) {
175 } else if (rm == 4 && mod != 3) { // SIB
228 DumpRmReg(address, rex_w, rm, byte_operand || byte_second_operand,
233 DumpBaseReg(address, rex64, rm);
328 const char* opcode3 = ""; // Mod-rm part.
330 bool store = false; // stores to memory (ie rm is on the left)
331 bool load = false; // loads from memory (ie rm is on the right)
1484 uint8_t rm = modrm & 7; local
1485 std::string address = DumpAddress(mod, rm, rex6
[all...]
/art/compiler/optimizing/
H A Dcode_generator_arm_vixl.cc1614 static Operand GetShifterOperand(vixl32::Register rm, ShiftType shift, uint32_t shift_imm) { argument
1615 return shift_imm == 0 ? Operand(rm) : Operand(rm, shift, shift_imm);

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