Searched defs:shift_type (Results 1 - 7 of 7) sorted by relevance

/external/capstone/bindings/ocaml/
H A Darm.ml13 shift_type: int; (* TODO: covert this to pattern like arm_op_value? *) Record field in type:arm_op_shift
H A Darm64.ml8 shift_type: int; Record field in type:arm64_op_shift
/external/v8/src/arm64/
H A Ddisasm-arm64.cc1553 const char* shift_type[] = {"lsl", "lsr", "asr", "ror"}; local
1554 AppendToOutput(", %s #%" PRId32, shift_type[instr->ShiftDP()],
/external/vixl/src/aarch64/
H A Ddisasm-aarch64.cc4686 const char *shift_type[] = {"lsl", "lsr", "asr", "ror"}; local
4688 shift_type[instr->GetShiftDP()],
H A Dsimulator-aarch64.cc339 Shift shift_type,
353 switch (shift_type) {
1172 Shift shift_type = static_cast<Shift>(instr->GetShiftDP()); local
1176 shift_type,
337 ShiftOperand(unsigned reg_size, int64_t value, Shift shift_type, unsigned amount) const argument
/external/v8/src/arm/
H A Dsimulator-arm.cc2785 int32_t shift_type = instr->Bit(6); local
2787 if (shift_type == 0) { // LSL
/external/valgrind/VEX/priv/
H A Dguest_arm_toIR.c9128 UInt regD = 99, regN = 99, regM = 99, imm5 = 99, shift_type = 99; local
9139 shift_type = (INSNT1(5,5) << 1) | 0;
9152 shift_type = (INSNA(6,6) << 1) | 0;
9164 dis_buf, &irt_regM_shift, NULL, irt_regM, shift_type, imm5, regM );
9188 UInt regD = 99, regN = 99, shift_type = 99, imm5 = 99, sat_imm = 99; local
9197 shift_type = (INSNT0(5,5) << 1) | 0;
9202 if (shift_type == BITS2(1,0) && imm5 == 0)
9210 shift_type = (INSNA(6,6) << 1) | 0;
9227 irt_regN, shift_type, imm5, regN );
9246 UInt regD = 99, regN = 99, shift_type local
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