Searched defs:timg (Results 1 - 2 of 2) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/r200/
H A Dradeon_tex_copy.c42 radeon_texture_image *timg,
49 const GLuint face = timg->base.Base.Face;
50 const GLuint level = timg->base.Base.Level;
66 if (_mesa_get_format_bits(timg->base.Base.TexFormat, GL_DEPTH_BITS) > 0) {
74 if (!timg->mt) {
79 assert(timg->mt);
80 assert(timg->mt->bo);
81 assert(timg->base.Base.Width >= dstx + width);
82 assert(timg->base.Base.Height >= dsty + height);
85 intptr_t dst_offset = radeon_miptree_image_offset(timg
40 do_copy_texsubimage(struct gl_context *ctx, struct radeon_tex_obj *tobj, radeon_texture_image *timg, GLint dstx, GLint dsty, struct radeon_renderbuffer *rrb, GLint x, GLint y, GLsizei width, GLsizei height) argument
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/external/mesa3d/src/mesa/drivers/dri/radeon/
H A Dradeon_tex_copy.c42 radeon_texture_image *timg,
49 const GLuint face = timg->base.Base.Face;
50 const GLuint level = timg->base.Base.Level;
66 if (_mesa_get_format_bits(timg->base.Base.TexFormat, GL_DEPTH_BITS) > 0) {
74 if (!timg->mt) {
79 assert(timg->mt);
80 assert(timg->mt->bo);
81 assert(timg->base.Base.Width >= dstx + width);
82 assert(timg->base.Base.Height >= dsty + height);
85 intptr_t dst_offset = radeon_miptree_image_offset(timg
40 do_copy_texsubimage(struct gl_context *ctx, struct radeon_tex_obj *tobj, radeon_texture_image *timg, GLint dstx, GLint dsty, struct radeon_renderbuffer *rrb, GLint x, GLint y, GLsizei width, GLsizei height) argument
[all...]

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