/art/runtime/verifier/ |
H A D | reg_type_cache.h | 96 const RegType& FromUnresolvedMerge(const RegType& left,
|
/art/compiler/optimizing/ |
H A D | nodes.h | 533 // because it can be created anytime after the pass and thus it will be left 726 // CHA guard optimization pass when there is no CHA guard left. 3449 HInstruction* left, 3454 SetRawInputAt(0, left); 3470 HInstruction* left = InputAt(0); local 3472 if (left->IsConstant() && !right->IsConstant()) { 3474 ReplaceInput(left, 1); 3484 HInstruction* left = InputAt(0); local 3486 if (left == right || (!left 3447 HBinaryOperation(InstructionKind kind, DataType::Type result_type, HInstruction* left, HInstruction* right, SideEffects side_effects = SideEffects::None(), uint32_t dex_pc = kNoDexPc) argument 4819 HAdd(DataType::Type result_type, HInstruction* left, HInstruction* right, uint32_t dex_pc = kNoDexPc) argument 4855 HSub(DataType::Type result_type, HInstruction* left, HInstruction* right, uint32_t dex_pc = kNoDexPc) argument 4889 HMul(DataType::Type result_type, HInstruction* left, HInstruction* right, uint32_t dex_pc = kNoDexPc) argument 4925 HDiv(DataType::Type result_type, HInstruction* left, HInstruction* right, uint32_t dex_pc) argument 4973 HRem(DataType::Type result_type, HInstruction* left, HInstruction* right, uint32_t dex_pc) argument 5187 HAnd(DataType::Type result_type, HInstruction* left, HInstruction* right, uint32_t dex_pc = kNoDexPc) argument 5225 HOr(DataType::Type result_type, HInstruction* left, HInstruction* right, uint32_t dex_pc = kNoDexPc) argument 5263 HXor(DataType::Type result_type, HInstruction* left, HInstruction* right, uint32_t dex_pc = kNoDexPc) argument [all...] |
H A D | code_generator_arm_vixl.cc | 1811 const Location left = locations->InAt(0); local 1816 const vixl32::Register left_high = HighRegisterFrom(left); 1817 const vixl32::Register left_low = LowRegisterFrom(left); 1932 Location left = locations->InAt(0); local 1944 __ Cmp(HighRegisterFrom(left), HighRegisterFrom(right)); 1952 __ cmp(eq, LowRegisterFrom(left), LowRegisterFrom(right)); 1969 std::swap(left, right); 1975 __ Cmp(LowRegisterFrom(left), LowRegisterFrom(right)); 1976 __ Sbcs(temps.Acquire(), HighRegisterFrom(left), HighRegisterFrom(right)); 2051 const Location left local 2107 const Location left = locations->InAt(0); local 2965 const vixl32::Register left = InputRegisterAt(cond, 0); local 3330 vixl32::Register left = InputRegisterAt(cond, 0); local 5265 Location left = locations->InAt(0); local [all...] |
H A D | code_generator_vector_arm_vixl.cc | 760 vixl32::DRegister left = DRegisterFrom(locations->InAt(1)); local 777 __ Vsub(DataTypeValue::I32, tmp, left, right);
|
H A D | code_generator_x86_64.cc | 1525 Location left = locations->InAt(0); local 1536 codegen_->GenerateIntCompare(left, right); 1540 codegen_->GenerateLongCompare(left, right); 1545 __ ucomiss(left.AsFpuRegister<XmmRegister>(), right.AsFpuRegister<XmmRegister>()); 1547 __ ucomiss(left.AsFpuRegister<XmmRegister>(), 1552 __ ucomiss(left.AsFpuRegister<XmmRegister>(), 1559 __ ucomisd(left.AsFpuRegister<XmmRegister>(), right.AsFpuRegister<XmmRegister>()); 1561 __ ucomisd(left.AsFpuRegister<XmmRegister>(), 1566 __ ucomisd(left.AsFpuRegister<XmmRegister>(), 2072 Location left local [all...] |
H A D | code_generator_arm64.cc | 2533 Register left; local 2535 left = InputRegisterAt(instruction, 0); 2562 __ Add(out, left, right_operand); 2565 __ And(out, left, right_operand); 2572 __ Orr(out, left, right_operand); 2575 __ Sub(out, left, right_operand); 2578 __ Eor(out, left, right_operand); 3172 // 0 if: left == right 3173 // 1 if: left > right 3174 // -1 if: left < righ 3184 Register left = InputRegisterAt(compare, 0); local [all...] |
H A D | code_generator_x86.cc | 1430 Location left = locations->InAt(0); local 1434 Register left_high = left.AsRegisterPairHigh<Register>(); 1435 Register left_low = left.AsRegisterPairLow<Register>(); 1569 Location left = locations->InAt(0); local 1578 GenerateFPCompare(left, right, condition, false); 1582 GenerateFPCompare(left, right, condition, true); 4361 Location left = locations->InAt(0); local 4374 codegen_->GenerateIntCompare(left, right); 4378 Register left_low = left.AsRegisterPairLow<Register>(); 4379 Register left_high = left [all...] |
/art/runtime/arch/mips64/ |
H A D | quick_entrypoints_mips64.S | 1060 dsll $t3, $t3, 4 # shift the frame size left 4 to align to 16 bytes 1162 dsll $t3, $t3, 4 # shift the frame size left 4 to align to 16 bytes 1683 ld $a4, THREAD_LOCAL_ALLOC_STACK_END_OFFSET($s1) # has any room left. 2622 // Shift left by the forwarding address shift. This clears out the state bits since they are 2854 // Shift left by the forwarding address shift. This clears out the state bits since they are
|
/art/oatdump/ |
H A D | oatdump.cc | 1747 StackMap left = code_info_.GetStackMapAt(lhs, encoding_); 1748 uint32_t left_pc = left.GetNativePcOffset(encoding_.stack_map.encoding,
|
/art/runtime/arch/mips/ |
H A D | quick_entrypoints_mips.S | 1758 lw $t4, THREAD_LOCAL_ALLOC_STACK_END_OFFSET($s1) # stack has any room left. 2813 // Shift left by the forwarding address shift. This clears out the state bits since they are 3079 // Shift left by the forwarding address shift. This clears out the state bits since they are
|