Searched refs:inst (Results 101 - 125 of 552) sorted by relevance

1234567891011>>

/external/llvm/test/MC/ARM/
H A Dinst-directive-emit.s10 .inst.w 0xf2400000, 0xf2c00000
18 @ CHECK: inst.w 0xf2400000
19 @ CHECK: inst.w 0xf2c00000
H A Dinst-thumb-overflow.s11 .inst.n 1 << 31
12 @ CHECK-ERROR: inst.n operand is too big, use inst.w instead
H A Dinst-thumb-suffixes.s11 .inst 0x0000
12 @ CHECK-ERROR: cannot determine Thumb instruction size, use inst.n/inst.w instead
H A Dinst-overflow.s11 .inst 1 << 32
12 @ CHECK-ERROR: inst operand is too big
H A Dinst-thumb-overflow-2.s11 .inst.w 1 << 32
12 @ CHECK-ERRORS: inst.w operand is too big
H A Ddirective-unsupported.s33 .inst 0xdefe
36 // CHECK: .inst 0xdefe
39 .inst.n 0xdefe
42 // CHECK: .inst.n 0xdefe
45 .inst.w 0xdefe
48 // CHECK: .inst.w 0xdefe
/external/mesa3d/src/gallium/drivers/r300/compiler/
H A Dradeon_remove_constants.c37 static void remap_regs(void * userdata, struct rc_instruction * inst, argument
47 static void mark_used(void * userdata, struct rc_instruction * inst, argument
86 for (struct rc_instruction *inst = c->Program.Instructions.Next;
87 inst != &c->Program.Instructions; inst = inst->Next) {
88 rc_for_all_reads_src(inst, mark_used, &d);
128 for (struct rc_instruction *inst = c->Program.Instructions.Next;
129 inst != &c->Program.Instructions; inst
[all...]
H A Dr300_fragprog.c34 static void presub_string(char out[10], unsigned int inst) argument
36 switch(inst & 0x600000){
94 inst[i] >> R300_TEX_INST_SHIFT) &
116 inst[i] >> R300_DST_ADDR_SHIFT) & 31,
119 inst[i] >> R300_SRC_ADDR_SHIFT) & 31,
121 inst[i] & R300_TEX_ID_MASK) >>
123 code->tex.inst[i]);
136 int regc = code->alu.inst[i].rgb_addr >> (j * 6);
137 int rega = code->alu.inst[i].alpha_addr >> (j * 6);
139 code->alu.inst[
[all...]
H A Dradeon_emulate_loops.c89 static void update_const_value(void * data, struct rc_instruction * inst, argument
98 switch(inst->U.I.Opcode){
100 if(!rc_src_reg_is_immediate(value->C, inst->U.I.SrcReg[0].File,
101 inst->U.I.SrcReg[0].Index)){
107 inst->U.I.SrcReg[0].Index,
108 inst->U.I.SrcReg[0].Swizzle,
109 inst->U.I.SrcReg[0].Negate, 0);
114 static void get_incr_amount(void * data, struct rc_instruction * inst, argument
136 opcode = rc_get_opcode_info(inst->U.I.Opcode);
141 if(inst
196 struct rc_instruction * inst; local
327 build_loop_info(struct radeon_compiler * c, struct loop_info * loop, struct rc_instruction * inst) argument
434 transform_loop(struct emulate_loop_state * s, struct rc_instruction * inst) argument
504 struct rc_instruction * inst; local
[all...]
H A Dradeon_program_tex.c58 struct rc_instruction *inst,
65 inst_mov = rc_insert_new_instruction(&compiler->Base, inst->Prev);
70 inst_mov->U.I.SrcReg[0] = inst->U.I.SrcReg[0];
74 state_constant, inst->U.I.TexSrcUnit);
76 reset_srcreg(&inst->U.I.SrcReg[0]);
77 inst->U.I.SrcReg[0].File = RC_FILE_TEMPORARY;
78 inst->U.I.SrcReg[0].Index = temp;
82 struct rc_instruction *inst)
88 inst_rcp = rc_insert_new_instruction(&compiler->Base, inst->Prev);
93 inst_rcp->U.I.SrcReg[0] = inst
57 scale_texcoords(struct r300_fragment_program_compiler *compiler, struct rc_instruction *inst, unsigned state_constant) argument
81 projective_divide(struct r300_fragment_program_compiler *compiler, struct rc_instruction *inst) argument
122 radeonTransformTEX( struct radeon_compiler * c, struct rc_instruction * inst, void* data) argument
[all...]
H A Dradeon_rename_regs.c50 struct rc_instruction * inst; local
56 for(inst = c->Program.Instructions.Next;
57 inst != &c->Program.Instructions;
58 inst = inst->Next) {
59 if (inst->U.I.Opcode == RC_OPCODE_BGNLOOP)
/external/mesa3d/src/mesa/state_tracker/
H A Dst_atifs_to_tgsi.c349 const struct atifs_instruction *inst)
358 unsigned dstreg = inst->DstReg[optype].Index - GL_REG_0_ATI;
360 if (!inst->Opcode[optype])
363 desc = &inst_desc[inst->Opcode[optype] - GL_MOV_ATI];
367 if (arg >= inst->ArgCount[optype]) {
373 &inst->SrcReg[optype][arg]);
383 GLuint dstMask = inst->DstReg[optype].dstMask;
394 emit_dstmod(t, *dst, inst->DstReg[optype].dstMod);
517 struct atifs_instruction *inst = &atifs->Instructions[pass][i]; local
518 compile_instruction(t, inst);
348 compile_instruction(struct st_translate *t, const struct atifs_instruction *inst) argument
579 struct atifs_instruction *inst = &atifs->Instructions[pass][i]; local
632 set_src(struct tgsi_full_instruction *inst, unsigned i, unsigned file, unsigned index, unsigned x, unsigned y, unsigned z, unsigned w) argument
693 struct tgsi_full_instruction inst; local
[all...]
H A Dst_cb_drawpixels_shader.c56 set_src(struct tgsi_full_instruction *inst, unsigned i, unsigned file, unsigned index, argument
59 inst->Src[i].Register.File = file;
60 inst->Src[i].Register.Index = index;
61 inst->Src[i].Register.SwizzleX = x;
62 inst->Src[i].Register.SwizzleY = y;
63 inst->Src[i].Register.SwizzleZ = z;
64 inst->Src[i].Register.SwizzleW = w;
67 #define SET_SRC(inst, i, file, index, x, y, z, w) \
68 set_src(inst, i, file, index, TGSI_SWIZZLE_##x, TGSI_SWIZZLE_##y, \
160 struct tgsi_full_instruction inst; local
[all...]
/external/mesa3d/src/gallium/drivers/vc4/
H A Dvc4_qir_schedule.c45 struct qinst *inst; member in struct:schedule_node
182 struct qinst *inst = n->inst; local
190 for (int i = 0; i < qir_get_nsrc(inst); i++) {
191 switch (inst->src[i].file) {
194 state->last_temp_write[inst->src[i].index], n);
210 switch (inst->op) {
253 switch (inst->dst.file) {
259 add_write_dep(dir, &state->last_temp_write[inst->dst.index], n);
285 if (qir_depends_on_flags(inst))
304 struct qinst *inst = n->inst; local
428 get_register_pressure_cost(struct schedule_state *state, struct qinst *inst) argument
447 locks_scoreboard(struct qinst *inst) argument
642 struct qinst *inst = chosen->inst; local
[all...]
H A Dvc4_qir_emit_uniform_stream_resets.c41 qir_for_each_inst(inst, block) {
42 if (qir_has_uniform_read(inst))
82 qir_for_each_inst(inst, block) {
83 if (qir_has_uniform_read(inst))
/external/mesa3d/src/mesa/program/
H A Dprog_optimize.c54 get_src_arg_mask(const struct prog_instruction *inst, argument
60 assert(arg < _mesa_num_inst_src_regs(inst->Opcode));
63 switch (inst->Opcode) {
79 channel_mask = inst->DstReg.WriteMask & dst_mask;
107 const GLuint coord = GET_SWZ(inst->SrcReg[arg].Swizzle, comp);
214 struct prog_instruction *inst = prog->arb.Instructions + i; local
215 const GLuint numSrc = _mesa_num_inst_src_regs(inst->Opcode);
218 if (inst->SrcReg[j].File == file) {
219 GLuint index = inst->SrcReg[j].Index;
221 inst
258 const struct prog_instruction *inst = prog->arb.Instructions + i; local
301 struct prog_instruction *inst = prog->arb.Instructions + i; local
369 const struct prog_instruction *inst = prog->arb.Instructions + i; local
581 const struct prog_instruction *inst = prog->arb.Instructions + i; local
618 _mesa_merge_mov_into_inst(struct prog_instruction *inst, const struct prog_instruction *mov) argument
973 const struct prog_instruction *inst = instructions + i; local
1262 struct prog_instruction *inst = program->arb.Instructions + i; local
[all...]
/external/mesa3d/src/gallium/drivers/vc4/kernel/
H A Dvc4_validate_shaders.c113 raddr_add_a_to_live_reg_index(uint64_t inst) argument
115 uint32_t sig = QPU_GET_FIELD(inst, QPU_SIG);
116 uint32_t add_a = QPU_GET_FIELD(inst, QPU_ADD_A);
117 uint32_t raddr_a = QPU_GET_FIELD(inst, QPU_RADDR_A);
118 uint32_t raddr_b = QPU_GET_FIELD(inst, QPU_RADDR_B);
183 uint64_t inst = validation_state->shader[validation_state->ip]; local
185 QPU_GET_FIELD(inst, QPU_WADDR_MUL) :
186 QPU_GET_FIELD(inst, QPU_WADDR_ADD));
187 uint32_t raddr_a = QPU_GET_FIELD(inst, QPU_RADDR_A);
188 uint32_t raddr_b = QPU_GET_FIELD(inst, QPU_RADDR_
307 uint64_t inst = validation_state->shader[validation_state->ip]; local
380 uint64_t inst = validation_state->shader[validation_state->ip]; local
471 uint64_t inst = validation_state->shader[validation_state->ip]; local
546 uint64_t inst = validation_state->shader[validation_state->ip]; local
565 check_branch(uint64_t inst, struct vc4_validated_shader_info *validated_shader, struct vc4_shader_validation_state *validation_state, int ip) argument
593 uint64_t inst = validation_state->shader[validation_state->ip]; local
632 uint64_t inst = validation_state->shader[ip]; local
798 uint64_t inst = validation_state.shader[ip]; local
[all...]
/external/mesa3d/src/mesa/drivers/dri/i965/
H A Dbrw_vec4_visitor.cpp65 vec4_visitor::emit(vec4_instruction *inst) argument
67 inst->ir = this->base_ir;
68 inst->annotation = this->current_annotation;
70 this->instructions.push_tail(inst);
72 return inst;
76 vec4_visitor::emit_before(bblock_t *block, vec4_instruction *inst, argument
79 new_inst->ir = inst->ir;
80 new_inst->annotation = inst->annotation;
82 inst->insert_before(block, new_inst);
84 return inst;
195 vec4_instruction *inst; local
210 vec4_instruction *inst; local
231 vec4_instruction *inst; local
257 vec4_instruction *inst; local
271 vec4_instruction *inst; local
535 vec4_instruction *inst = emit(MOV(saturated, src0)); local
724 vec4_instruction *inst = emit(BRW_OPCODE_SEL, dst, src0, src1); local
853 vec4_instruction *inst = local
957 vec4_instruction *inst = new(mem_ctx) vec4_instruction(opcode, dest); local
1234 vec4_instruction *inst; local
1422 vec4_instruction *inst = emit_urb_write_opcode(complete); local
1431 get_scratch_offset(bblock_t *block, vec4_instruction *inst, src_reg *reladdr, int reg_offset) argument
1476 emit_scratch_read(bblock_t *block, vec4_instruction *inst, dst_reg temp, src_reg orig_src, int base_offset) argument
1506 emit_scratch_write(bblock_t *block, vec4_instruction *inst, int base_offset) argument
1596 emit_resolve_reladdr(int scratch_loc[], bblock_t *block, vec4_instruction *inst, src_reg src) argument
1704 emit_pull_constant_load(bblock_t *block, vec4_instruction *inst, dst_reg temp, src_reg orig_src, int base_offset, src_reg indirect) argument
1745 block, inst); local
[all...]
H A Dbrw_fs_combine_constants.cpp48 could_coissue(const struct gen_device_info *devinfo, const fs_inst *inst) argument
53 switch (inst->opcode) {
68 must_promote_imm(const struct gen_device_info *devinfo, const fs_inst *inst) argument
70 switch (inst->opcode) {
109 fs_inst *inst; member in struct:imm
210 foreach_block_and_inst(block, fs_inst, inst, cfg) {
213 if (!could_coissue(devinfo, inst) && !must_promote_imm(devinfo, inst))
216 for (int i = 0; i < inst->sources; i++) {
217 if (inst
[all...]
H A Dbrw_fs_cse.cpp48 is_expression(const fs_visitor *v, const fs_inst *const inst) argument
50 switch (inst->opcode) {
108 return inst->mlen < 2;
110 return !inst->is_copy_payload(v->alloc);
112 return inst->is_send_from_grf() && !inst->has_side_effects() &&
113 !inst->is_volatile();
200 create_copy_instr(const fs_builder &bld, fs_inst *inst, fs_reg src, bool negate) argument
202 unsigned written = regs_written(inst);
204 DIV_ROUND_UP(inst
[all...]
/external/python/cpython2/Demo/metaclasses/
H A DTrace.py47 inst = TracingInstance()
48 inst.__meta_init__(self)
50 init = inst.__getattr__('__init__')
54 return inst
83 def __init__(self, name, func, inst):
86 self.inst = inst
88 return apply(self.func, (self.inst,) + args, kw)
92 self.inst.__trace_call__(self.inst
[all...]
/external/objenesis/main/src/test/java/org/objenesis/instantiator/basic/
H A DProxyingInstantiatorTest.java33 ObjectInstantiator<EmptyClass> inst = new ProxyingInstantiator<EmptyClass>(EmptyClass.class);
34 EmptyClass c = inst.newInstance();
/external/mesa3d/src/gallium/auxiliary/tgsi/
H A Dtgsi_exec.c1059 tgsi_check_soa_dependencies(const struct tgsi_full_instruction *inst) argument
1063 uint writemask = inst->Dst[0].Register.WriteMask;
1074 for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
1075 if ((inst->Src[i].Register.File ==
1076 inst->Dst[0].Register.File) &&
1077 ((inst->Src[i].Register.Index ==
1078 inst->Dst[0].Register.Index) ||
1079 inst->Src[i].Register.Indirect ||
1080 inst->Dst[0].Register.Indirect)) {
1084 if (inst
1778 store_dest_dstret(struct tgsi_exec_machine *mach, const union tgsi_exec_channel *chan, const struct tgsi_full_dst_register *reg, const struct tgsi_full_instruction *inst, uint chan_index, enum tgsi_exec_datatype dst_datatype) argument
1997 store_dest_double(struct tgsi_exec_machine *mach, const union tgsi_exec_channel *chan, const struct tgsi_full_dst_register *reg, const struct tgsi_full_instruction *inst, uint chan_index, enum tgsi_exec_datatype dst_datatype) argument
2020 store_dest(struct tgsi_exec_machine *mach, const union tgsi_exec_channel *chan, const struct tgsi_full_dst_register *reg, const struct tgsi_full_instruction *inst, uint chan_index, enum tgsi_exec_datatype dst_datatype) argument
2066 exec_kill_if(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
2108 exec_kill(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
2211 fetch_texel_offsets(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst, int8_t offsets[3]) argument
2240 fetch_assign_deriv_channel(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst, unsigned regdsrcx, unsigned chan, float derivs[2][TGSI_QUAD_SIZE]) argument
2260 fetch_sampler_unit(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst, uint sampler) argument
2303 exec_tex(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst, uint modifier, uint sampler) argument
2411 exec_lodq(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
2452 exec_txd(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
2560 exec_txf(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
2645 exec_txq(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
2676 exec_sample(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst, uint modifier, boolean compare) argument
2807 exec_sample_d(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
3049 exec_scalar_unary(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst, micro_unary_op op, enum tgsi_exec_datatype dst_datatype, enum tgsi_exec_datatype src_datatype) argument
3069 exec_vector_unary(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst, micro_unary_op op, enum tgsi_exec_datatype dst_datatype, enum tgsi_exec_datatype src_datatype) argument
3098 exec_scalar_binary(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst, micro_binary_op op, enum tgsi_exec_datatype dst_datatype, enum tgsi_exec_datatype src_datatype) argument
3119 exec_vector_binary(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst, micro_binary_op op, enum tgsi_exec_datatype dst_datatype, enum tgsi_exec_datatype src_datatype) argument
3150 exec_vector_trinary(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst, micro_trinary_op op, enum tgsi_exec_datatype dst_datatype, enum tgsi_exec_datatype src_datatype) argument
3183 exec_vector_quaternary(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst, micro_quaternary_op op, enum tgsi_exec_datatype dst_datatype, enum tgsi_exec_datatype src_datatype) argument
3211 exec_dp3(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
3235 exec_dp4(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
3259 exec_dp2a(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
3284 exec_dph(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
3313 exec_dp2(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
3335 exec_pk2h(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
3355 exec_up2h(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
3374 exec_scs(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
3401 exec_xpd(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
3446 exec_dst(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
3479 exec_log(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
3505 exec_exp(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
3530 exec_lit(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
3581 exec_switch(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
3599 exec_case(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
3687 store_double_channel(struct tgsi_exec_machine *mach, const union tgsi_double_channel *chan, const struct tgsi_full_dst_register *reg, const struct tgsi_full_instruction *inst, uint chan_0, uint chan_1) argument
3727 exec_double_unary(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst, micro_dop op) argument
3747 exec_double_binary(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst, micro_dop op, enum tgsi_exec_datatype dst_datatype) argument
3789 exec_double_trinary(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst, micro_dop op) argument
3813 exec_dldexp(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
3838 exec_dfracexp(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
3860 exec_arg0_64_arg1_32(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst, micro_dop_sop op) argument
3934 exec_load_img(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
3981 exec_load_buf(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
4014 exec_load_mem(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
4046 exec_load(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
4058 exec_store_img(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
4103 exec_store_buf(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
4138 exec_store_mem(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
4170 exec_store(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
4182 exec_atomop_img(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
4250 exec_atomop_buf(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
4309 exec_atomop_mem(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
4382 exec_atomop(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
4394 exec_resq_img(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
4428 exec_resq_buf(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
4458 exec_resq(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) argument
4568 exec_t_2_64(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst, micro_dop_s op, enum tgsi_exec_datatype src_datatype) argument
4589 exec_64_2_t(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst, micro_sop_d op, enum tgsi_exec_datatype dst_datatype) argument
5143 exec_instruction( struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst, int *pc ) argument
6287 uint inst = 1; local
[all...]
/external/mesa3d/src/gallium/auxiliary/gallivm/
H A Dlp_bld_tgsi_info.c107 const struct tgsi_full_instruction *inst,
118 tex_info->target = inst->Texture.Texture;
119 switch (inst->Texture.Texture) {
160 tex_info->sampler_unit = inst->Src[3].Register.Index;
161 tex_info->texture_unit = inst->Src[3].Register.Index;
168 tex_info->sampler_unit = inst->Src[1].Register.Index;
169 tex_info->texture_unit = inst->Src[1].Register.Index;
175 analyse_src(ctx, chan_info, &inst->Src[0].Register, chan);
202 const struct tgsi_full_instruction *inst,
211 unsigned target = ctx->sample_target[inst
106 analyse_tex(struct analysis_context *ctx, const struct tgsi_full_instruction *inst, enum lp_build_tex_modifier modifier) argument
201 analyse_sample(struct analysis_context *ctx, const struct tgsi_full_instruction *inst, enum lp_build_tex_modifier modifier, boolean shadow) argument
284 analyse_instruction(struct analysis_context *ctx, struct tgsi_full_instruction *inst) argument
565 struct tgsi_full_instruction *inst = local
[all...]
/external/mesa3d/src/gallium/drivers/r300/compiler/tests/
H A Dradeon_compiler_optimize_tests.c56 struct rc_instruction *inst; local
67 for(inst = c.Program.Instructions.Next;
68 inst != &c.Program.Instructions;
69 inst = inst->Next, inst_count++) {
70 inst_list[inst_count] = inst;

Completed in 3032 milliseconds

1234567891011>>