Searched refs:r2 (Results 26 - 50 of 1167) sorted by relevance

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/external/libcxx/test/std/re/re.regex/re.regex.assign/
H A Dassign_iter_iter_flag.pass.cpp30 std::regex r2; local
32 r2.assign(I(s4.begin()), I(s4.end()));
33 assert(r2.flags() == std::regex::ECMAScript);
34 assert(r2.mark_count() == 2);
36 r2.assign(I(s4.begin()), I(s4.end()), std::regex::extended);
37 assert(r2.flags() == std::regex::extended);
38 assert(r2.mark_count() == 2);
40 r2.assign(F(s4.begin()), F(s4.end()));
41 assert(r2.flags() == std::regex::ECMAScript);
42 assert(r2
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/external/mesa3d/src/gallium/drivers/nouveau/codegen/lib/
H A Dgf100.asm10 // CLOBBER: $r2 - $r3, $p0 - $p1
14 bfind u32 $r2 $r1
15 xor b32 $r2 $r2 0x1f
17 shl b32 $r2 $r3 clamp $r2
19 mul $r3 u32 $r1 u32 $r2
20 add $r2 (mul high u32 $r2 u32 $r3) $r2
[all...]
H A Dgk110.asm10 // CLOBBER: $r2 - $r3, $p0 - $p1
15 bfind u32 $r2 $r1
16 xor b32 $r2 $r2 0x1f
18 shl b32 $r2 $r3 clamp $r2
20 mul $r3 u32 $r1 u32 $r2
21 add $r2 (mul high u32 $r2 u32 $r3) $r2
[all...]
/external/valgrind/none/tests/arm/
H A Dv6intThumb.stdout.exp141 orrs r1, r2 :: rd 0x37595f2f rm 0x27181728, c:v-in 0, cpsr 0x00000000
142 orrs r1, r2 :: rd 0x00000000 rm 0x00000000, c:v-in 0, cpsr 0x40000000 Z
143 orrs r1, r2 :: rd 0x00000001 rm 0x00000000, c:v-in 0, cpsr 0x00000000
144 orrs r1, r2 :: rd 0x00000001 rm 0x00000001, c:v-in 0, cpsr 0x00000000
145 orrs r1, r2 :: rd 0x80000000 rm 0x00000000, c:v-in 0, cpsr 0x80000000 N
146 orrs r1, r2 :: rd 0x80000000 rm 0x80000000, c:v-in 0, cpsr 0x80000000 N
147 orrs r1, r2 :: rd 0x80000000 rm 0x80000000, c:v-in 0, cpsr 0x80000000 N
148 orrs r1, r2 :: rd 0x37595f2f rm 0x27181728, c:v-in 1, cpsr 0x10000000 V
149 orrs r1, r2 :: rd 0x00000000 rm 0x00000000, c:v-in 1, cpsr 0x50000000 Z V
150 orrs r1, r2
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H A Dv6intARM.c165 TESTINST3("adds r0, r1, r2", 0, 0, r0, r1, r2, 0);
166 TESTINST3("adds r0, r1, r2", 0, 1, r0, r1, r2, 0);
167 TESTINST3("adds r0, r1, r2", 1, 0, r0, r1, r2, 0);
168 TESTINST3("adds r0, r1, r2", 1, 1, r0, r1, r2, 0);
169 TESTINST3("adds r0, r1, r2", 0, -1, r0, r1, r2,
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/external/capstone/suite/MC/ARM/
H A Darm-it-block.s.cs2 0x03,0x20,0xa0,0x01 = moveq r2, r3
H A Darm_addrmode2.s.cs2 0x02,0x10,0xb0,0xe6 = ldrt r1, [r0], r2
3 0xa2,0x11,0xb0,0xe6 = ldrt r1, [r0], r2, lsr #3 external variable declarations
5 0x02,0x10,0xf0,0xe6 = ldrbt r1, [r0], r2
6 0xa2,0x11,0xf0,0xe6 = ldrbt r1, [r0], r2, lsr #3 external variable declarations
8 0x02,0x10,0xa0,0xe6 = strt r1, [r0], r2
9 0xa2,0x11,0xa0,0xe6 = strt r1, [r0], r2, lsr #3 external variable declarations
11 0x02,0x10,0xe0,0xe6 = strbt r1, [r0], r2
12 0xa2,0x11,0xe0,0xe6 = strbt r1, [r0], r2, lsr #3 external variable declarations
14 0xa2,0x11,0xb0,0xe7 = ldr r1, [r0, r2, lsr #3]!
15 0xa2,0x11,0xf0,0xe7 = ldrb r1, [r0, r2, ls
[all...]
/external/libcxx/test/std/utilities/function.objects/refwrap/refwrap.helpers/
H A Dcref_2.pass.cpp23 std::reference_wrapper<const int> r2 = std::cref(r1); local
24 assert(&r2.get() == &i);
/external/libxaac/decoder/armv7/
H A Dixheaacd_ffr_divide16.s32 MOVS r2, r0, ASR #1
33 RSBMI r2, r2, #0
39 MOV r2, r2, LSL #1
40 CMP r2, r3
43 SUBCS r2, r2, r3
/external/llvm/test/MC/ARM/
H A Dmul-v4.s5 @ ARMV4: mul r0, r1, r2 @ encoding: [0x91,0x02,0x00,0xe0]
6 @ ARMV4: muls r0, r1, r2 @ encoding: [0x91,0x02,0x10,0xe0]
7 @ ARMV4: mulne r0, r1, r2 @ encoding: [0x91,0x02,0x00,0x10]
8 @ ARMV4: mulseq r0, r1, r2 @ encoding: [0x91,0x02,0x10,0x00]
9 mul r0, r1, r2
10 muls r0, r1, r2
11 mulne r0, r1, r2
12 mulseq r0, r1, r2
14 @ ARMV4: mla r0, r1, r2, r3 @ encoding: [0x91,0x32,0x20,0xe0]
15 @ ARMV4: mlas r0, r1, r2, r
[all...]
H A Dv7k-dsp.s3 @ CHECK: usad8 r2, r1, r4
4 usad8 r2, r1, r4
H A Dthumbv8m.s29 uxtab16 r0, r1, r2
52 // CHECK: sdiv r1, r2, r3 @ encoding: [0x92,0xfb,0xf3,0xf1]
53 sdiv r1, r2, r3
55 // CHECK: udiv r1, r2, r3 @ encoding: [0xb2,0xfb,0xf3,0xf1]
56 udiv r1, r2, r3
63 // CHECK: ldrex r1, [r2, #4] @ encoding: [0x52,0xe8,0x01,0x1f]
64 ldrex r1, [r2, #4]
66 // CHECK: ldrexb r1, [r2] @ encoding: [0xd2,0xe8,0x4f,0x1f]
67 ldrexb r1, [r2]
69 // CHECK: ldrexh r1, [r2]
[all...]
H A Darm-aliases.s5 add r1, r2, r3, lsl #0
6 sub r1, r2, r3, ror #0
7 eor r1, r2, r3, lsr #0
8 orr r1, r2, r3, asr #0
9 and r1, r2, r3, ror #0
10 bic r1, r2, r3, lsl #0
12 @ CHECK: add r1, r2, r3 @ encoding: [0x03,0x10,0x82,0xe0]
13 @ CHECK: sub r1, r2, r3 @ encoding: [0x03,0x10,0x42,0xe0]
14 @ CHECK: eor r1, r2, r3 @ encoding: [0x03,0x10,0x22,0xe0]
15 @ CHECK: orr r1, r2, r
[all...]
/external/valgrind/coregrind/m_dispatch/
H A Ddispatch-arm-linux.S64 r2 holds host_addr
82 bx r2
90 /* At this point, r1 and r2 contain two
92 holds a TRC value, and r2 optionally may
105 movw r2, #0
113 str r2, [r0, #4]
128 mov r2, lr
132 sub r2, r2, #4+4+4
143 mov r2, l
[all...]
/external/ltp/include/
H A Dtst_kvercmp.h41 int tst_kvcmp(const char *cur_kver, int r1, int r2, int r3);
63 int tst_kvercmp(int r1, int r2, int r3);
70 int tst_kvercmp2(int r1, int r2, int r3, struct tst_kern_exv *vers);
/external/valgrind/none/tests/s390x/
H A Dbfp-1.c32 register float r2 asm("f2") = f2;
34 __asm__ volatile ("aebr %[r1],%[r2]\n\t"
36 : [r2] "f"(r2) : "cc");
43 register float r2 asm("f2") = f2;
45 __asm__ volatile ("sebr %[r1],%[r2]\n\t"
47 : [r2] "f"(r2) : "cc");
54 register float r2 asm("f2") = f2;
56 __asm__ volatile ("meebr %[r1],%[r2]\
[all...]
H A Dopcodes.h25 #define RRF_R0RR2(op,r3,u0,r1,r2) ".long 0x" #op #r3 #u0 #r1 #r2 "\n\t"
47 #define RRS(op1,r1,r2,b4,d4,m3,u0,op2) \
48 ".short 0x" #op1 #r1 #r2 "\n\t" \
50 #define RIE_RRPU(op1,r1,r2,i4,m3,u0,op2) \
51 ".short 0x" #op1 #r1 #r2 "\n\t" \
53 #define RRE_RR(op,u0,r1,r2) ".long 0x" #op #u0 #r1 #r2 "\n\t"
54 #define RRE_RERE(op,r1,r2) ".long 0x" #op "00" #r1 #r2 "\
[all...]
/external/javaparser/javaparser-testing/src/test/java/com/github/javaparser/
H A DRangeTest.java47 Range r2 = Range.range(2, 1, 7, 10);
48 assertEquals(false, r1.contains(r2));
49 assertEquals(false, r2.contains(r1));
55 Range r2 = Range.range(2, 1, 7, 10);
56 assertEquals(false, r1.strictlyContains(r2));
57 assertEquals(false, r2.strictlyContains(r1));
63 Range r2 = Range.range(5, 1, 7, 10);
64 assertEquals(false, r1.contains(r2));
65 assertEquals(false, r2.contains(r1));
71 Range r2
[all...]
/external/swiftshader/third_party/LLVM/test/MC/ARM/
H A Darm_instructions.s15 @ CHECK: and r1, r2, r3 @ encoding: [0x03,0x10,0x02,0xe0]
16 and r1,r2,r3
18 @ CHECK: ands r1, r2, r3 @ encoding: [0x03,0x10,0x12,0xe0]
19 ands r1,r2,r3
21 @ CHECK: eor r1, r2, r3 @ encoding: [0x03,0x10,0x22,0xe0]
22 eor r1,r2,r3
24 @ CHECK: eors r1, r2, r3 @ encoding: [0x03,0x10,0x32,0xe0]
25 eors r1,r2,r3
27 @ CHECK: sub r1, r2, r3 @ encoding: [0x03,0x10,0x42,0xe0]
28 sub r1,r2,r
[all...]
H A Darm_addrmode2.s4 @ CHECK: ldrt r1, [r0], r2 @ encoding: [0x02,0x10,0xb0,0xe6]
5 @ CHECK: ldrt r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xb0,0xe6]
7 @ CHECK: ldrbt r1, [r0], r2 @ encoding: [0x02,0x10,0xf0,0xe6]
8 @ CHECK: ldrbt r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xf0,0xe6]
10 @ CHECK: strt r1, [r0], r2 @ encoding: [0x02,0x10,0xa0,0xe6]
11 @ CHECK: strt r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xa0,0xe6]
13 @ CHECK: strbt r1, [r0], r2 @ encoding: [0x02,0x10,0xe0,0xe6]
14 @ CHECK: strbt r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xe0,0xe6]
16 ldrt r1, [r0], r2
17 ldrt r1, [r0], r2, ls
[all...]
/external/libcxx/test/std/containers/sequences/vector.bool/
H A Dreference.swap.pass.cpp28 std::vector<bool>::reference r2 = v[3]; local
31 static_assert((noexcept(v.swap(r1,r2))), "");
35 assert( r2);
36 v.swap(r1, r2);
38 assert(!r2);
/external/libcxx/test/std/algorithms/alg.modifying.operations/alg.partitions/
H A Dpartition_copy.pass.cpp34 int r2[10] = {0}; local
37 std::begin(r1), std::begin(r2), is_odd());
41 && std::none_of(std::begin(r2), p.second, is_odd())
42 && std::all_of(p.second, std::end(r2), [](int a){return a == 0;})
52 int r2[10] = {0};
56 output_iterator<int*>(r1), r2, is_odd());
62 assert(p.second == r2 + 4);
63 assert(r2[0] == 2);
64 assert(r2[1] == 4);
65 assert(r2[
[all...]
/external/libhevc/common/arm/
H A Dihevc_mem_fns.s70 @ r2 => num_bytes
88 SUBS r2,r2,#8
102 @ r2 => num_bytes
110 SUBS r2,#8
117 SUBS r2,#8
119 CMP r2,#-8
123 ADD r2,#8
128 SUBS r2,#1
141 @ r2
[all...]
/external/libcxx/test/std/utilities/function.objects/refwrap/refwrap.assign/
H A Dcopy_assign.pass.cpp29 std::reference_wrapper<T> r2(t2);
30 r2 = r;
31 assert(&r2.get() == &t);
41 std::reference_wrapper<void ()> r2(g);
42 r2 = r;
43 assert(&r2.get() == &f);
/external/swiftshader/third_party/subzero/src/
H A DIceRegList.h28 #define REGLIST3(ns, r0, r1, r2) \
29 { ns::Reg_##r0, ns::Reg_##r1, ns::Reg_##r2 }
30 #define REGLIST4(ns, r0, r1, r2, r3) \
31 { ns::Reg_##r0, ns::Reg_##r1, ns::Reg_##r2, ns::Reg_##r3 }
32 #define REGLIST7(ns, r0, r1, r2, r3, r4, r5, r6) \
34 ns::Reg_##r0, ns::Reg_##r1, ns::Reg_##r2, ns::Reg_##r3, ns::Reg_##r4, \

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