/external/tensorflow/tensorflow/compiler/xla/tests/ |
H A D | multioutput_fusion_test.cc | 79 HloInstruction* sub = builder.AddInstruction(HloInstruction::CreateBinary( local 85 HloInstruction::CreateDot(elem_shape2, sub, add2, dot_dnums)); 90 ArraySlice<HloInstruction*>({sub, add2}, 0, 2))); 100 {tuple, sub, add2, broadcast}, HloInstruction::FusionKind::kLoop), 134 HloInstruction* sub = builder.AddInstruction( local 144 ShapeUtil::MakeShape(F32, {1}), sub, reshape, dot_dnums)); 155 TF_CHECK_OK(sub->ReplaceOperandWith(0, gte0));
|
/external/libhevc/common/arm64/ |
H A D | ihevc_inter_pred_luma_copy_w16out.s | 100 sub x11,x12,#4 134 sub x0,x5,x11 135 sub x1,x10,x11,lsl #1 147 //sub x11,x12,#8 150 sub x20,x12,x3, lsl #2 // x11 = (dst_strd * 4) - width 152 sub x20,x12,x2,lsl #2 //x2->src_strd 156 sub x4,x12,#0 //wd conditional check 157 sub x7,x7,#4 //subtract one for epilog 186 sub x20,x12,#0 //wd conditional check 233 sub x2 [all...] |
H A D | ihevc_itrans_recon_8x8.s | 166 sub x10,x10, #8 // - 4 cols * sizeof(word16) 167 sub x5,x6, #8 // src_strd - 4 cols * sizeof(word16) 243 sub v20.4s, v20.4s , v22.4s //// c1 = y0 * cos4 - y4 * cos4(part of a0 and a1) 251 sub v10.4s, v10.4s , v6.4s //// a3 = c0 - d0(part of x3,x4) 252 sub v22.4s, v20.4s , v18.4s //// a2 = c1 - d1(part of x2,x5) 256 sub v6.4s, v14.4s , v24.4s //// a0 - b0(part of x7) 259 sub v22.4s, v22.4s , v28.4s //// a2 - b2(part of x5) 262 sub v18.4s, v18.4s , v26.4s //// a1 - b1(part of x6) 265 sub v30.4s, v10.4s , v30.4s //// a3 - b3(part of x4) 321 sub v1 [all...] |
H A D | ihevc_intra_pred_chroma_planar.s | 112 stp d8,d14,[sp,#-16]! // Storing d14 using { sub sp,sp,#8; str d14,[sp] } is giving bus error. 120 sub x20, x5, #32 127 sub x6, x4, #1 //nt-1 146 sub x6, x6, #1 //2nt-1 152 sub x9, x4, x8 //nt-1-row (row is first 0) 177 sub v30.8b, v2.8b , v17.8b //[nt-1-col] 178 sub v31.8b, v2.8b , v25.8b 206 sub v19.8b, v6.8b , v7.8b //[nt-1-row]-- 226 sub v6.8b, v19.8b , v7.8b //[nt-1-row]-- 248 sub v1 [all...] |
/external/llvm/utils/ |
H A D | update_test_checks.py | 63 r'^\s*(?:[^:\n]+?:\s*\n\s*\.size|\.cfi_endproc|\.globl|\.comm|\.(?:sub)?section)', 87 asm = SCRUB_X86_SHUFFLES_RE.sub(r'\1 {{.*#+}} \2', asm) 89 asm = SCRUB_X86_SP_RE.sub(r'{{[0-9]+}}(%\1)', asm) 91 asm = SCRUB_X86_RIP_RE.sub(r'{{.*}}(%rip)', asm) 93 asm = SCRUB_X86_LCP_RE.sub(r'{{\.LCPI.*}}', asm) 95 asm = SCRUB_KILL_COMMENT_RE.sub('', asm) 102 body = SCRUB_WHITESPACE_RE.sub(r' ', body) 106 body = SCRUB_TRAILING_WHITESPACE_RE.sub(r'', body) 239 func_line = SCRUB_IR_COMMENT_RE.sub(r'', func_line) 364 input_line = SCRUB_LEADING_WHITESPACE_RE.sub( [all...] |
/external/zlib/src/contrib/masmx64/ |
H A D | inffasx64.asm | 104 sub bl, ah ; /* bits -= this.bits */
120 sub bl, ah ; /* bits -= this.bits */
142 sub bl, cl
170 sub bl, ah ; /* bits -= this.bits */
180 sub bl, cl
192 sub rax, [rsp+40] ; /* nbytes = out - beg */
199 sub rsi, r15 ; /* from = out - dist */
279 sub eax, ecx ; /* eax -= nbytes */
286 sub eax, ecx ; /* eax -= nbytes */
289 sub rs [all...] |
/external/clang/test/Analysis/inlining/ |
H A D | containers.cpp | 38 void testSubclass(MySetSubclass &sub) { argument 39 sub.useIterator(sub.begin());
|
/external/google-breakpad/src/testing/gtest/test/ |
H A D | gtest_help_test.py | 56 INCORRECT_FLAG_VARIANTS = [re.sub('^--', '-', LIST_TESTS_FLAG), 57 re.sub('^--', '/', LIST_TESTS_FLAG), 58 re.sub('_', '-', LIST_TESTS_FLAG)]
|
/external/googletest/googletest/test/ |
H A D | gtest_help_test.py | 56 INCORRECT_FLAG_VARIANTS = [re.sub('^--', '-', LIST_TESTS_FLAG), 57 re.sub('^--', '/', LIST_TESTS_FLAG), 58 re.sub('_', '-', LIST_TESTS_FLAG)]
|
/external/llvm/unittests/Support/ |
H A D | CommandLineTest.cpp | 295 StackOption<bool> SC1Opt("sc1", cl::sub(SC1), cl::init(false)); 296 StackOption<bool> SC2Opt("sc2", cl::sub(SC2), cl::init(false)); 338 StackOption<bool> SC1Opt("sc1", cl::sub(SC1), cl::init(false)); 339 StackOption<bool> SC2Opt("sc2", cl::sub(SC2), cl::init(false)); 349 StackOption<bool> AllOpt("everywhere", cl::sub(*cl::AllSubCommands), 379 StackOption<bool> TopLevelOpt("top-level", cl::sub(*cl::TopLevelSubCommand), 400 StackOption<bool> RemoveOption("remove-option", cl::sub(SC), cl::init(false)); 401 StackOption<bool> KeepOption("keep-option", cl::sub(SC), cl::init(false)); 419 "top-level-remove", cl::sub(*cl::TopLevelSubCommand), cl::init(false)); 421 "top-level-keep", cl::sub(*c [all...] |
/external/protobuf/gtest/test/ |
H A D | gtest_help_test.py | 55 INCORRECT_FLAG_VARIANTS = [re.sub('^--', '-', LIST_TESTS_FLAG), 56 re.sub('^--', '/', LIST_TESTS_FLAG), 57 re.sub('_', '-', LIST_TESTS_FLAG)]
|
/external/v8/testing/gtest/test/ |
H A D | gtest_help_test.py | 56 INCORRECT_FLAG_VARIANTS = [re.sub('^--', '-', LIST_TESTS_FLAG), 57 re.sub('^--', '/', LIST_TESTS_FLAG), 58 re.sub('_', '-', LIST_TESTS_FLAG)]
|
/external/vulkan-validation-layers/tests/gtest-1.7.0/test/ |
H A D | gtest_help_test.py | 56 INCORRECT_FLAG_VARIANTS = [re.sub('^--', '-', LIST_TESTS_FLAG), 57 re.sub('^--', '/', LIST_TESTS_FLAG), 58 re.sub('_', '-', LIST_TESTS_FLAG)]
|
/external/libavc/common/armv8/ |
H A D | ih264_resi_trans_quant_av8.s | 116 sub v10.4h, v2.4h, v4.4h //x2 = x5-x6 117 sub v11.4h, v0.4h, v6.4h //x3 = x4-x7 123 sub v16.4h, v8.4h, v9.4h //x6 = x0 - x1; 125 sub v17.4h, v11.4h, v12.4h //x7 = x3 - u_shift(x2,1,shft); 142 sub v20.4h, v15.4h , v16.4h //x2 = x5-x6 143 sub v21.4h, v14.4h , v17.4h //x3 = x4-x7 151 sub v26.4h, v18.4h , v19.4h //x7 = x0 - x1; 153 sub v27.4h, v21.4h , v22.4h //x8 = x3 - u_shift(x2,1,shft); 227 sub v26.8b, v25.8b , v0.8b //invert current nnz 318 sub v1 [all...] |
/external/mesa3d/src/gallium/drivers/r300/compiler/ |
H A D | radeon_compiler_util.c | 183 * This function rewrites the writemask of sub and adjusts the swizzles 190 struct rc_pair_sub_instruction * sub, 193 const struct rc_opcode_info * info = rc_get_opcode_info(sub->Opcode); 196 sub->WriteMask = rewrite_writemask(sub->WriteMask, conversion_swizzle); 203 sub->Arg[i].Swizzle = 204 rc_adjust_channels(sub->Arg[i].Swizzle, 226 struct rc_sub_instruction * sub = &inst->U.I; local 227 const struct rc_opcode_info * info = rc_get_opcode_info(sub->Opcode); 228 sub 189 rc_pair_rewrite_writemask( struct rc_pair_sub_instruction * sub, unsigned int conversion_swizzle) argument 553 get_source_readmask( struct rc_pair_sub_instruction * sub, unsigned int source, unsigned int src_type) argument [all...] |
/external/v8/src/regexp/arm/ |
H A D | regexp-macro-assembler-arm.cc | 216 __ sub(r1, r1, r0, SetCC); // Length of capture. 244 __ sub(r2, r2, r1); // Offset by length when matching backwards. 264 __ sub(r3, r3, Operand('a')); 268 __ sub(r3, r3, Operand(224 - 'a')); 284 __ sub(current_input_offset(), r2, end_of_input_address()); 289 __ sub(current_input_offset(), current_input_offset(), r1); 315 __ sub(r1, r1, r4); 340 __ sub(current_input_offset(), current_input_offset(), r4); 359 __ sub(r1, r1, r0, SetCC); // Length to check. 382 __ sub(r [all...] |
/external/clang/lib/StaticAnalyzer/Checkers/ |
H A D | ObjCUnusedIVarsChecker.cpp | 54 const Expr *sub = *i; local 55 if (const OpaqueValueExpr *OVE = dyn_cast<OpaqueValueExpr>(sub)) 56 sub = OVE->getSourceExpr(); 57 Scan(M, sub);
|
/external/compiler-rt/lib/builtins/arm/ |
H A D | udivmodsi4.S | 69 sub r3, r3, ip 72 sub ip, ip, r3, lsl #1 76 sub ip, ip, r3, lsl #2 77 sub ip, ip, r3, lsl #3
|
H A D | udivsi3.S | 69 sub r3, r3, ip 72 sub ip, ip, r3, lsl #1 76 sub ip, ip, r3, lsl #2 77 sub ip, ip, r3, lsl #3
|
/external/guava/guava-tests/test/com/google/common/collect/ |
H A D | TreeRangeMapTest.java | 385 RangeMap<Integer, Integer> sub = rangeMap.subRangeMap(Range.closed(5, 11)); 387 sub.asMapOfRanges()); 388 sub.put(Range.closed(7, 9), 4); 392 sub.asMapOfRanges()); 399 sub.put(Range.open(9, 12), 5); 404 sub = sub.subRangeMap(Range.closedOpen(5, 5)); 405 sub.put(Range.closedOpen(5, 5), 6); // should be a no-op 417 RangeMap<Integer, Integer> sub = rangeMap.subRangeMap(Range.closed(5, 11)); 419 sub [all...] |
/external/libmpeg2/common/armv8/ |
H A D | ideint_spatial_filter_av8.s | 76 sub x5, x0, #1 97 sub x5, x0, #1 204 sub x5, x5, x8 209 sub x7, x7, x9
|
/external/libnl/doc/ |
H A D | doxygen-link.py | 43 print(rc.sub(translate, line), end='')
|
/external/libvpx/libvpx/vpx_ports/ |
H A D | emms.asm | 24 sub rsp, 8 33 sub rsp, 8
|
/external/llvm/test/MC/ARM/ |
H A D | arm-aliases.s | 6 sub r1, r2, r3, ror #0 13 @ CHECK: sub r1, r2, r3 @ encoding: [0x03,0x10,0x42,0xe0]
|
/external/llvm/test/MC/X86/ |
H A D | intel-syntax-ambiguous.s | 27 sub [eax], 1 label 28 // CHECK: error: ambiguous operand size for instruction 'sub'
|