Searched refs:t5 (Results 26 - 50 of 146) sorted by relevance

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/external/clang/test/Sema/
H A Dattr-cleanup.c42 void t5() { function
H A Dwarn-char-subscripts.c28 void t5() { function
H A Dfunction.c20 int t5(b); // expected-error {{parameter list without types}}
H A Dthread-specifier.c22 struct t5 { __thread int x; }; struct
/external/python/cpython2/Lib/idlelib/idle_test/
H A Dtest_calltips.py24 def t5(self, ai, b=None, *args, **kw): 'doc' member in class:TC
25 t5.tip = "(self, ai, b=None, *args, **kwargs)"
108 def t5(a, b=None, *args, **kwds): 'doc' function in function:Get_signatureTest.test_functions
109 t5.tip = "(a, b=None, *args, **kwargs)"
112 for func in (t1, t2, t3, t4, t5, TC):
117 for meth in (TC.t1, TC.t2, TC.t3, TC.t4, TC.t5, TC.t6, TC.__call__):
/external/python/cpython3/Lib/idlelib/idle_test/
H A Dtest_calltips.py22 def t5(self, ai, b=None, *args, **kw): 'doc' member in class:TC
23 t5.tip = "(self, ai, b=None, *args, **kw)"
110 def t5(a, b=None, *args, **kw): 'doc' function in function:.test_functions
111 t5.tip = "(a, b=None, *args, **kw)"
114 for func in (t1, t2, t3, t4, t5, TC):
119 for meth in (TC.t1, TC.t2, TC.t3, TC.t4, TC.t5, TC.t6, TC.__call__):
/external/valgrind/none/tests/mips32/
H A Dmips32_dspr2.stdout.exp6 absq_s.qb $t5, $t3 :: rd 0x7f000000 rt 0x80000000 DSPControl 0x100000
14 absq_s.qb $t5, $t3 :: rd 0x6d474b22 rt 0x93474bde DSPControl 0x0
22 absq_s.qb $t5, $t3 :: rd 0x55555555 rt 0xabababab DSPControl 0x0
30 absq_s.qb $t5, $t3 :: rd 0x083b3571 rt 0x083b3571 DSPControl 0x0
38 absq_s.qb $t5, $t3 :: rd 0x5b631478 rt 0xa5631488 DSPControl 0x0
45 addqh.ph $t4, $t1, $t5 :: rs 0x00002435 rt 0xffff3421 out 0xffff2c2b
47 addqh.ph $t5, $t3, $t2 :: rs 0xf973437b rt 0x80000000 out 0xbcb921bd
52 addqh.ph $t4, $t1, $t5 :: rs 0x80002435 rt 0x80003421 out 0x80002c2b
54 addqh.ph $t5, $t3, $t2 :: rs 0x80000000 rt 0x80000000 out 0x80000000
60 addqh.ph $t4, $t1, $t5
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/external/python/cpython2/Lib/test/
H A Dtest_pkg.py180 ("t5", None),
181 ("t5 __init__"+os.extsep+"py", "import t5.foo"), namespace
182 ("t5 string"+os.extsep+"py", "spam = 1"),
183 ("t5 foo"+os.extsep+"py",
188 import t5 namespace
190 from t5 import *
191 self.assertEqual(dir(), ['foo', 'self', 'string', 't5'])
195 import t5 namespace
196 self.assertEqual(fixdir(dir(t5)),
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/external/python/cpython3/Lib/test/
H A Dtest_pkg.py184 ("t5", None),
185 ("t5 __init__.py", "import t5.foo"),
186 ("t5 string.py", "spam = 1"),
187 ("t5 foo.py",
192 import t5 namespace
194 from t5 import *
195 self.assertEqual(dir(), ['foo', 'self', 'string', 't5'])
199 import t5 namespace
200 self.assertEqual(fixdir(dir(t5)),
[all...]
/external/clang/test/CodeGenCXX/
H A Daarch64-aapcs-zerolength-bitfield.cpp44 struct t5 struct
50 static_assert(offsetof(struct t5, bar) == 8);
51 static_assert(sizeof(struct t5) == 16);
/external/owasp/sanitizer/src/tests/org/owasp/html/
H A DBenchmark.java98 long t4 = 0, t5 = -1;
104 t5 = System.nanoTime();
122 "Full sanitize w/ PB : %12d", (t5 - t4)));
/external/clang/test/CodeGen/
H A Dasm.c31 void t5(int i) { function
32 asm("nop" : "=r"(i) : "0"(t5));
H A Dattributes.c4 // CHECK: @t5 = weak global i32 2
5 int t5 __attribute__((weak)) = 2; variable
H A Dcomplex.c75 void t5() { function
/external/bouncycastle/bcprov/src/main/java/org/bouncycastle/crypto/engines/
H A DAESEngine.java322 int t5 = Pack.littleEndianToInt(key, 20); W[1][1] = t5;
325 int u = subWord(shift(t5, 8)) ^ rcon; rcon <<= 1;
331 t5 ^= t4; W[2][3] = t5;
335 u = subWord(shift(t5, 8)) ^ rcon; rcon <<= 1;
341 t5 ^= t4; W[i + 1][1] = t5;
342 u = subWord(shift(t5, 8)) ^ rcon; rcon <<= 1;
348 t5
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/external/libvpx/libvpx/vpx_dsp/arm/
H A Dvpx_convolve8_neon.c154 uint8x8_t t4, t5, t6, t7; local
159 load_u8_8x8(src, src_stride, &t0, &t1, &t2, &t3, &t4, &t5, &t6, &t7);
160 transpose_u8_8x8(&t0, &t1, &t2, &t3, &t4, &t5, &t6, &t7);
166 s5 = vreinterpretq_s16_u16(vmovl_u8(t5));
169 load_u8_8x8(src + 7, src_stride, &t0, &t1, &t2, &t3, &t4, &t5, &t6,
180 transpose_u8_4x8(&t0, &t1, &t2, &t3, t4, t5, t6, t7);
235 load_u8_8x8(src, src_stride, &t0, &t1, &t2, &t3, &t4, &t5, &t6, &t7);
236 transpose_u8_8x8(&t0, &t1, &t2, &t3, &t4, &t5, &t6, &t7);
242 s5 = vreinterpretq_s16_u16(vmovl_u8(t5));
258 load_u8_8x8(s, src_stride, &t0, &t1, &t2, &t3, &t4, &t5,
411 uint8x8_t t4, t5, t6, t7; local
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/external/v8/src/mips/
H A Dcodegen-mips.cc143 __ lw(t5, MemOperand(a1, 5, loadstore_chunk));
153 __ sw(t5, MemOperand(a0, 5, loadstore_chunk));
162 __ lw(t5, MemOperand(a1, 13, loadstore_chunk));
172 __ sw(t5, MemOperand(a0, 13, loadstore_chunk));
193 __ lw(t5, MemOperand(a1, 5, loadstore_chunk));
202 __ sw(t5, MemOperand(a0, 5, loadstore_chunk));
307 __ lwr(t5, MemOperand(a1, 5, loadstore_chunk));
320 __ lwl(t5,
342 __ lwl(t5, MemOperand(a1, 5, loadstore_chunk));
355 __ lwr(t5,
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/external/clang/test/CXX/dcl.decl/dcl.init/dcl.init.ref/
H A Dp5.cpp57 unsigned &t5 = (a->var ? a->bitX : a->bitX); // expected-error {{non-const reference cannot bind to bit-field}} local
/external/clang/test/Parser/
H A Dms-inline-asm.c13 void t5() { function
/external/valgrind/VEX/priv/
H A Dguest_mips_toIR.c1475 IRTemp t5 = newTemp(Ity_I64); local
1482 assign(t5, binop(Iop_32HLto64, mkexpr(t4), mkexpr(t3)));
1483 assign(t2, unop(Iop_ReinterpI64asF64, mkexpr(t5)));
1509 IRTemp t5 = newTemp(Ity_I32); local
1514 assign(t5, unop(Iop_64to32, mkexpr(t6))); /* lo */
1515 putFReg(dregNo & (~1), unop(Iop_ReinterpI32asF32, mkexpr(t5)));
2796 IRTemp t0, t1 = 0, t2, t3, t4, t5, t6, t7, t8, t9, t10, t11, t12, t13, t14, local
2935 t5 = newTemp(Ity_I1);
2977 /* t5 holds 1 if t4 is equal to 0x80, or 0 otherwise. */
2978 assign(t5, bino
12108 IRTemp t0, t1 = 0, t2, t3, t4, t5, t6, t7; local
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/external/libchrome/base/
H A Dtuple_unittest.cc43 std::tuple<int, int, int, int, int*> t5(1, 2, 3, 4, &std::get<0>(t4));
56 DispatchToMethod(&addy, &Addy::DoAdd, t5);
/external/valgrind/coregrind/m_syswrap/
H A Dpriv_types_n_macros.h581 #define PRE_REG_READ5(tr, s, t1, a1, t2, a2, t3, a3, t4, a4, t5, a5) \
585 PRA4(s,t4,a4); PRA5(s,t5,a5); \
587 #define PRE_REG_READ6(tr, s, t1, a1, t2, a2, t3, a3, t4, a4, t5, a5, t6, a6) \
591 PRA4(s,t4,a4); PRA5(s,t5,a5); PRA6(s,t6,a6); \
593 #define PRE_REG_READ7(tr, s, t1, a1, t2, a2, t3, a3, t4, a4, t5, a5, t6, a6, t7, a7) \
597 PRA4(s,t4,a4); PRA5(s,t5,a5); PRA6(s,t6,a6); \
601 #define PRE_REG_READ8(tr, s, t1, a1, t2, a2, t3, a3, t4, a4, t5, a5, t6, a6, t7, a7, t8, a8) \
605 PRA4(s,t4,a4); PRA5(s,t5,a5); PRA6(s,t6,a6); \
/external/bouncycastle/bcprov/src/main/java/org/bouncycastle/math/ec/custom/sec/
H A DSecP256R1Field.java113 long t5 = xx13 + xx14;
115 long t7 = t5 - t0;
124 cc += (xx[2] & M) + t2 - t5;
133 cc += (xx[5] & M) + (t5 << 1) - t2;
/external/llvm/test/MC/Mips/mips4/
H A Dinvalid-mips64.s15 madd $s6,$t5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
24 suxc1 $f12,$k1($t5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
/external/syslinux/gnu-efi/gnu-efi-3.0/apps/
H A DMakefile63 TARGET_APPS = t.efi t2.efi t3.efi t4.efi t5.efi t6.efi \

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