| /art/runtime/interpreter/mterp/x86_64/ |
| H A D | binopWide2addr.S | 9 $instr # for ex: addq %rax,(rFP,%rcx,4)
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| H A D | binopWide.S | 8 $instr # ex: addq (rFP,%rcx,4),%rax
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| H A D | footer.S | 285 addq $$FRAME_SIZE, %rsp
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| H A D | header.S | 230 addq rIBASE, %rax
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| /art/runtime/arch/x86_64/ |
| H A D | quick_entrypoints_x86_64.S | 45 addq MACRO_LITERAL(4 * 8), %rsp
140 addq LITERAL(8 + 4*8), %rsp
255 addq MACRO_LITERAL(80 + 4 * 8), %rsp
394 addq MACRO_LITERAL(16 + 16 * 8), %rsp
405 addq MACRO_LITERAL(16 + 16 * 8 + 8), %rsp
582 addq MACRO_LITERAL(1), %r10 // shorty++
589 addq MACRO_LITERAL(4), %r11 // arg_array++
593 addq MACRO_LITERAL(4), %r11 // arg_array++
597 addq MACRO_LITERAL(8), %r11 // arg_array+=2
601 addq MACRO_LITERA
[all...] |
| H A D | jni_entrypoints_x86_64.S | 63 addq LITERAL(72 + 4 * 8), %rsp
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| /art/compiler/utils/x86_64/ |
| H A D | jni_macro_assembler_x86_64.cc | 123 __ addq(CpuRegister(RSP), Immediate(adjust));
141 __ addq(CpuRegister(RSP), Immediate(-static_cast<int64_t>(adjust)));
147 assembler->addq(CpuRegister(RSP), Immediate(adjust));
365 __ addq(CpuRegister(RSP), Immediate(16));
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| H A D | assembler_x86_64.h | 698 void addq(CpuRegister reg, const Immediate& imm);
699 void addq(CpuRegister dst, CpuRegister src);
700 void addq(CpuRegister dst, const Address& address);
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| H A D | assembler_x86_64_test.cc | 564 DriverStr(RepeatRR(&x86_64::X86_64Assembler::addq, "addq %{reg2}, %{reg1}"), "addq");
568 DriverStr(RepeatRI(&x86_64::X86_64Assembler::addq, /*imm_bytes*/ 4U,
569 "addq ${imm}, %{reg}"), "addqi");
1040 DriverStr(RepeatRA(&x86_64::X86_64Assembler::addq, "addq {mem}, %{reg}"), "addq");
2056 str << "addq $" << displacement << ", %rsp\n";
2078 str << "addq
[all...] |
| H A D | assembler_x86_64.cc | 2571 void X86_64Assembler::addq(CpuRegister reg, const Immediate& imm) { function in class:art::x86_64::X86_64Assembler
2573 CHECK(imm.is_int32()); // addq only supports 32b immediate.
2579 void X86_64Assembler::addq(CpuRegister dst, const Address& address) { function in class:art::x86_64::X86_64Assembler
2587 void X86_64Assembler::addq(CpuRegister dst, CpuRegister src) { function in class:art::x86_64::X86_64Assembler
2589 // 0x01 is addq r/m64 <- r/m64 + r64, with op1 in r/m and op2 in reg: so reverse EmitRex64
3339 addq(CpuRegister(RSP), Immediate(2 * sizeof(intptr_t)));
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| /art/runtime/interpreter/mterp/out/ |
| H A D | mterp_x86_64.S | 237 addq rIBASE, %rax
4022 addq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax
4039 subq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax
4056 imulq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax
4153 andq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax
4170 orq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax
4187 xorq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax
4733 addq %rax, (rFP,%rcx,4) # for ex: addq
[all...] |
| /art/compiler/optimizing/ |
| H A D | code_generator_x86_64.cc | 1337 __ addq(CpuRegister(RSP), Immediate(adjust));
3034 // We can use a leaq or addq if the constant can fit in an immediate.
3088 __ addq(out.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>());
3090 __ addq(out.AsRegister<CpuRegister>(), first.AsRegister<CpuRegister>());
3101 __ addq(out.AsRegister<CpuRegister>(), Immediate(int32_value));
3432 __ addq(CpuRegister(RSP), Immediate(2 * elem_size));
3508 __ addq(rdx, numerator);
3600 __ addq(rdx, numerator);
3614 __ addq(rdx, rax);
5363 __ addq(CpuRegiste
[all...] |
| H A D | intrinsics_x86_64.cc | 307 __ addq(out, mask);
1741 __ addq(string_obj, Immediate(value_offset));
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