Searched refs:movss (Results 1 - 18 of 18) sorted by relevance

/art/runtime/interpreter/mterp/x86_64/
H A Dfpcvt.S14 movss %xmm0, VREG_ADDRESS(%rcx)
/art/compiler/utils/x86/
H A Djni_macro_assembler_x86.cc81 __ movss(Address(ESP, frame_size + spill.getSpillOffset()), spill.AsX86().AsXmmRegister());
144 __ movss(Address(ESP, offs), src.AsXmmRegister());
207 __ movss(dest.AsXmmRegister(), Address(ESP, src));
238 __ fs()->movss(dest.AsXmmRegister(), Address::Absolute(src));
309 __ movss(dest.AsXmmRegister(), Address(ESP, 0));
H A Dassembler_x86.h384 void movss(XmmRegister dst, const Address& src);
385 void movss(const Address& dst, XmmRegister src);
386 void movss(XmmRegister dst, XmmRegister src);
H A Dassembler_x86.cc412 void X86Assembler::movss(XmmRegister dst, const Address& src) { function in class:art::x86::X86Assembler
421 void X86Assembler::movss(const Address& dst, XmmRegister src) { function in class:art::x86::X86Assembler
430 void X86Assembler::movss(XmmRegister dst, XmmRegister src) { function in class:art::x86::X86Assembler
/art/compiler/utils/x86_64/
H A Djni_macro_assembler_x86_64.cc95 __ movss(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()),
181 __ movss(Address(CpuRegister(RSP), offs), src.AsXmmRegister());
251 __ movss(dest.AsXmmRegister(), Address(CpuRegister(RSP), src));
282 __ gs()->movss(dest.AsXmmRegister(), Address::Absolute(src, true));
359 __ movss(dest.AsXmmRegister(), Address(CpuRegister(RSP), 0));
H A Dassembler_x86_64.h418 void movss(XmmRegister dst, const Address& src);
419 void movss(const Address& dst, XmmRegister src);
420 void movss(XmmRegister dst, XmmRegister src);
H A Dassembler_x86_64.cc453 void X86_64Assembler::movss(XmmRegister dst, const Address& src) { function in class:art::x86_64::X86_64Assembler
463 void X86_64Assembler::movss(const Address& dst, XmmRegister src) { function in class:art::x86_64::X86_64Assembler
473 void X86_64Assembler::movss(XmmRegister dst, XmmRegister src) { function in class:art::x86_64::X86_64Assembler
H A Dassembler_x86_64_test.cc1126 DriverStr(RepeatFF(&x86_64::X86_64Assembler::movss, "movss %{reg2}, %{reg1}"), "movss");
/art/runtime/interpreter/mterp/out/
H A Dmterp_x86_64.S1128 movss VREG_ADDRESS(%rax), %xmm0
1169 movss VREG_ADDRESS(%rax), %xmm0
3360 movss %xmm0, VREG_ADDRESS(%rcx)
3383 movss %xmm0, VREG_ADDRESS(%rcx)
3426 movss %xmm0, VREG_ADDRESS(%rcx)
3449 movss %xmm0, VREG_ADDRESS(%rcx)
3469 movss VREG_ADDRESS(rINSTq), %xmm0
3502 movss VREG_ADDRESS(rINSTq), %xmm0
3538 movss %xmm0, VREG_ADDRESS(%rcx)
3627 movss
[all...]
H A Dmterp_x86.S1222 movss VREG_ADDRESS(%eax), %xmm0
1263 movss VREG_ADDRESS(%eax), %xmm0
4537 movss VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src
4539 movss %xmm0, VREG_ADDRESS(rINST) # vAA <- %xmm0
4541 movss %xmm0, VREG_REF_ADDRESS(rINST) # clear ref
4552 movss VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src
4554 movss %xmm0, VREG_ADDRESS(rINST) # vAA <- %xmm0
4556 movss %xmm0, VREG_REF_ADDRESS(rINST) # clear ref
4567 movss VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src
4569 movss
[all...]
/art/runtime/arch/x86/
H A Dquick_entrypoints_x86.S558 movss (REG_VAR(arg_array)), REG_VAR(xmm_reg)
682 movss %xmm0, (%ecx) // store the floating point result
799 movss %xmm0, (%ecx) // store the floating point result
1633 movss %xmm0, 0(%esp) // arg a
2414 movss %xmm0, (%ecx) // Store the floating point result
/art/runtime/arch/x86_64/
H A Dquick_entrypoints_x86_64.S600 movss (%r11), REG_VAR(xmm_reg)
727 movss %xmm0, (%r8) // Store the floating point result.
820 movss %xmm0, (%r8) // Store the floating point result.
2397 movss %xmm0, (%rcx) // Store the floating point result.
/art/compiler/optimizing/
H A Dintrinsics_x86.cc377 __ movss(temp, codegen->LiteralInt32Address(
565 __ movss(out, codegen->LiteralInt32Address(kFloatNaN, method_address, constant_area));
575 __ movss(out, Address(ESP, 0));
586 __ movss(out, op2);
901 __ movss(t2, in);
H A Dcode_generator_x86.cc1240 __ movss(destination.AsFpuRegister<XmmRegister>(), Address(ESP, source.GetStackIndex()));
1247 __ movss(Address(ESP, destination.GetStackIndex()), source.AsFpuRegister<XmmRegister>());
2410 __ movss(mask, codegen_->LiteralInt32Address(INT32_C(0x80000000),
3441 __ movss(out.AsFpuRegister<XmmRegister>(), Address(ESP, 0));
4840 __ movss(out.AsFpuRegister<XmmRegister>(), Address(base, offset));
5006 __ movss(Address(base, offset), value.AsFpuRegister<XmmRegister>());
5319 __ movss(out, CodeGeneratorX86::ArrayAddress(obj, index, TIMES_4, data_offset));
5555 __ movss(address, value.AsFpuRegister<XmmRegister>());
5814 __ movss(Address(ESP, destination.GetStackIndex()), source.AsFpuRegister<XmmRegister>());
5825 __ movss(destinatio
[all...]
H A Dcode_generator_x86_64.cc1396 __ movss(dest, Address(CpuRegister(RSP), source.GetStackIndex()));
1406 __ movss(Address(CpuRegister(RSP), destination.GetStackIndex()),
2530 __ movss(mask, codegen_->LiteralInt32Address(0x80000000));
3426 __ movss(out.AsFpuRegister<XmmRegister>(), Address(CpuRegister(RSP), 0));
4304 __ movss(out.AsFpuRegister<XmmRegister>(), Address(base, offset));
4458 __ movss(Address(base, offset), value.AsFpuRegister<XmmRegister>());
4763 __ movss(out, CodeGeneratorX86_64::ArrayAddress(obj, index, TIMES_4, data_offset));
4988 __ movss(address, value.AsFpuRegister<XmmRegister>());
5235 __ movss(destination.AsFpuRegister<XmmRegister>(),
5314 __ movss(Addres
[all...]
H A Dintrinsics_x86_64.cc268 __ movss(xmm_temp, codegen->LiteralInt32Address(INT32_C(0x7FFFFFFF)));
403 __ movss(out, codegen->LiteralInt32Address(INT32_C(0x7FC00000)));
412 __ movss(out, op2);
675 __ movss(t2, in);
H A Dcode_generator_vector_x86.cc1031 __ movss(dst, locations->InAt(1).AsFpuRegister<XmmRegister>());
H A Dcode_generator_vector_x86_64.cc1004 __ movss(dst, locations->InAt(0).AsFpuRegister<XmmRegister>());

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