Searched refs:Instruction (Results 1 - 25 of 34) sorted by relevance

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/device/linaro/bootloader/edk2/MdePkg/Library/BasePeCoffLib/Arm/
H A DPeCoffLoaderEx.c24 @param Instruction Pointer to ARM MOVT or MOVW immediate instruction
31 IN UINT16 *Instruction
39 Movt = (*Instruction << 16) | (*(Instruction + 1));
56 @param Instruction Pointer to ARM MOVT or MOVW immediate instruction
61 IN OUT UINT16 *Instruction,
71 *(Instruction) = (*Instruction & ~0x040f) | Patch;
77 Instruction++;
78 *Instruction
60 ThumbMovtImmediatePatch( IN OUT UINT16 *Instruction, IN UINT16 Address ) argument
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/device/linaro/bootloader/edk2/AppPkg/Applications/Lua/src/
H A Dlopcodes.h80 #define MASK1(n,p) ((~((~(Instruction)0)<<(n)))<<(p))
91 ((cast(Instruction, o)<<POS_OP)&MASK1(SIZE_OP,POS_OP))))
95 ((cast(Instruction, v)<<pos)&MASK1(size,pos))))
116 #define CREATE_ABC(o,a,b,c) ((cast(Instruction, o)<<POS_OP) \
117 | (cast(Instruction, a)<<POS_A) \
118 | (cast(Instruction, b)<<POS_B) \
119 | (cast(Instruction, c)<<POS_C))
121 #define CREATE_ABx(o,a,bc) ((cast(Instruction, o)<<POS_OP) \
122 | (cast(Instruction, a)<<POS_A) \
123 | (cast(Instruction, b
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H A Dlstate.h79 const Instruction *savedpc;
160 const Instruction *oldpc; /* last pc traced */
H A Dlcode.c38 Instruction *previous;
81 Instruction *jmp = &fs->f->code[pc];
109 static Instruction *getjumpcontrol (FuncState *fs, int pc) {
110 Instruction *pi = &fs->f->code[pc];
124 Instruction i = *getjumpcontrol(fs, list);
132 Instruction *i = getjumpcontrol(fs, node);
212 static int luaK_code (FuncState *fs, Instruction i) {
216 luaM_growvector(fs->ls->L, f->code, fs->pc, f->sizecode, Instruction,
441 Instruction *pc = &getcode(fs, e);
599 Instruction *p
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H A Dlundump.c89 f->code=luaM_newvector(S->L,n,Instruction);
91 LoadVector(S,f->code,n,sizeof(Instruction));
254 *h++=cast_byte(sizeof(Instruction));
H A Dldebug.c345 Instruction i = p->code[pc];
400 Instruction i = p->code[pc];
449 Instruction i = p->code[pc]; /* calling instruction */
H A Dluac.c279 const Instruction* code=f->code;
283 Instruction i=code[pc];
H A Dldump.c76 #define DumpCode(f,D) DumpVector(f->code,f->sizecode,sizeof(Instruction),D)
H A Dllimits.h133 typedef lu_int32 Instruction; typedef
/device/linaro/bootloader/edk2/BaseTools/Source/C/Common/
H A DPeCoffLoaderEx.c267 @param Instruction Pointer to ARM MOVT or MOVW immediate instruction
274 IN UINT16 *Instruction
282 Movt = (*Instruction << 16) | (*(Instruction + 1));
299 @param Instruction Pointer to ARM MOVT or MOVW immediate instruction
304 IN OUT UINT16 *Instruction,
313 *Instruction = (*Instruction & ~0x040f) | Patch;
318 Instruction++;
319 *Instruction
303 ThumbMovtImmediatePatch( IN OUT UINT16 *Instruction, IN UINT16 Address ) argument
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H A DPeCoffLib.h154 @param Instruction Pointer to ARM MOVT or MOVW immediate instruction
162 IN UINT16 *Instruction
168 @param Instruction Pointer to ARM MOVT or MOVW immediate instruction
175 IN OUT UINT16 *Instruction,
/device/linaro/bootloader/edk2/EmbeddedPkg/GdbStub/Arm/
H A DProcessor.c117 ISA = Instruction Set Architecture
390 UINT32 Instruction; member in struct:__anon5352
556 Breakpoint->Instruction = *(UINT32 *)Address;
565 //DEBUG((EFI_D_ERROR, "SetBreakpoint at 0x%08x (was: 0x%08x is:0x%08x)\n", Address, Breakpoint->Instruction, *(UINT32 *)Address));
585 *(UINT32 *)Address = Breakpoint->Instruction;
687 UINT32 Instruction; local
691 Instruction = *(UINT32 *)ExceptionAddress;
692 if (Instruction != GDB_ARM_BKPT) {
/device/linaro/bootloader/edk2/UefiCpuPkg/PiSmmCpuDxeSmm/
H A DSmmProfileInternal.h99 UINT64 Instruction; member in struct:__anon11625
/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EfiCommonLib/Ia32/
H A DEfiSetMem.c119 emms ; Exit MMX Instruction
H A DEfiSetMemSSE2.c122 emms ; Exit MMX Instruction
H A DEfiZeroMem.c104 emms ; Exit MMX Instruction
H A DEfiSetMem.S131 emms # Exit MMX Instruction
H A DEfiZeroMem.S115 emms # Exit MMX Instruction
H A DEfiSetMem.asm127 emms ; Exit MMX Instruction
H A DEfiZeroMem.asm113 emms ; Exit MMX Instruction
H A DEfiCopyMem.S147 emms # Exit MMX Instruction
H A DEfiCopyMem.c135 emms ; Exit MMX Instruction local
H A DEfiCopyMem.asm145 emms ; Exit MMX Instruction
/device/linaro/bootloader/edk2/ArmPkg/Library/ArmLib/Arm/
H A DArmV7Support.asm126 ldr R1,=IC_ON ; Specify SCTLR.I bit : Instruction cache enable bit
128 orr R0,R0,R1 ; Set SCTLR.I bit : Instruction caches enabled
135 ldr R1,=IC_ON ; Specify SCTLR.I bit : Instruction cache enable bit
137 BIC R0,R0,R1 ; Clear SCTLR.I bit : Instruction caches disabled
194 mcr p15, 2, R10, c0, c0, 0 ; write the Cache Size selection register (CSSELR) // OR in 1 for Instruction
/device/linaro/bootloader/edk2/MdePkg/Include/IndustryStandard/
H A DAcpi40.h1022 /// ERST Instruction Flags
1027 /// ERST Serialization Instruction Entry
1031 UINT8 Instruction; member in struct:__anon7225
1101 /// EINJ Instruction Flags
1106 /// EINJ Injection Instruction Entry
1110 UINT8 Instruction; member in struct:__anon7227

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