Searched refs:ExtOpc (Results 1 - 4 of 4) sorted by relevance
| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1266 unsigned ExtOpc = ISD::isSignedIntSetCC(CC) ? ISD::SIGN_EXTEND local
1268 SDValue LX = DAG.getNode(ExtOpc, dl, MVT::v2i32, LHS);
1269 SDValue RX = DAG.getNode(ExtOpc, dl, MVT::v2i32, RHS);
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 712 unsigned ExtOpc = local
714 return DAG.getNode(ExtOpc, dl, PVT, Op);
3869 unsigned ExtOpc,
3883 if (ExtOpc != ISD::ANY_EXTEND && User->getOpcode() == ISD::SETCC) {
3885 if (ExtOpc == ISD::ZERO_EXTEND && ISD::isSignedIntSetCC(CC))
3868 ExtendUsesToFormExtLoad(SDNode *N, SDValue N0, unsigned ExtOpc, SmallVector<SDNode*, 4> &ExtendNodes, const TargetLowering &TLI) argument
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 982 unsigned ExtOpc = local
984 return DAG.getNode(ExtOpc, dl, PVT, Op);
5838 unsigned ExtOpc,
5852 if (ExtOpc != ISD::ANY_EXTEND && User->getOpcode() == ISD::SETCC) {
5854 if (ExtOpc == ISD::ZERO_EXTEND && ISD::isSignedIntSetCC(CC))
5837 ExtendUsesToFormExtLoad(SDNode *N, SDValue N0, unsigned ExtOpc, SmallVectorImpl<SDNode *> &ExtendNodes, const TargetLowering &TLI) argument
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| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 20340 unsigned ExtOpc = local
20342 R = DAG.getNode(ExtOpc, dl, ExtVT, R);
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