| /external/swiftshader/third_party/LLVM/lib/Analysis/ |
| H A D | ScalarEvolution.cpp | 2130 IntegerType *ExtTy =
2139 getZeroExtendExpr(AR, ExtTy) ==
2140 getAddRecExpr(getZeroExtendExpr(AR->getStart(), ExtTy),
2141 getZeroExtendExpr(Step, ExtTy),
2154 getZeroExtendExpr(AR, ExtTy) ==
2155 getAddRecExpr(getZeroExtendExpr(AR->getStart(), ExtTy),
2156 getZeroExtendExpr(Step, ExtTy),
2169 Operands.push_back(getZeroExtendExpr(M->getOperand(i), ExtTy));
2170 if (getZeroExtendExpr(M, ExtTy) == getMulExpr(Operands))
2187 Operands.push_back(getZeroExtendExpr(A->getOperand(i), ExtTy));
[all...] |
| /external/llvm/lib/CodeGen/ |
| H A D | CodeGenPrepare.cpp | 2931 Type *ExtTy = Ext->getType(); local
2936 if (!ExtOpnd || !canGetThrough(ExtOpnd, ExtTy, PromotedInsts, IsSExt))
2953 if (!ExtOpnd->hasOneUse() && !TLI.isTruncateFree(ExtTy, ExtOpnd->getType()))
4080 Type *ExtTy = FirstUser->getType(); local
4087 if (CurTy == ExtTy)
4106 if (ExtTy->getScalarType()->getIntegerBitWidth() >
4109 LargeTy = ExtTy;
4111 NarrowTy = ExtTy;
|
| /external/llvm/lib/Analysis/ |
| H A D | ScalarEvolution.cpp | 2697 IntegerType *ExtTy =
2706 getZeroExtendExpr(AR, ExtTy) ==
2707 getAddRecExpr(getZeroExtendExpr(AR->getStart(), ExtTy),
2708 getZeroExtendExpr(Step, ExtTy),
2720 getZeroExtendExpr(AR, ExtTy) ==
2721 getAddRecExpr(getZeroExtendExpr(AR->getStart(), ExtTy),
2722 getZeroExtendExpr(Step, ExtTy),
2735 Operands.push_back(getZeroExtendExpr(Op, ExtTy));
2736 if (getZeroExtendExpr(M, ExtTy) == getMulExpr(Operands))
2753 Operands.push_back(getZeroExtendExpr(Op, ExtTy));
[all...] |
| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.h | 930 bool shouldReduceLoadWidth(SDNode *Load, ISD::LoadExtType ExtTy,
|
| H A D | X86ISelLowering.cpp | 4136 ISD::LoadExtType ExtTy,
4135 shouldReduceLoadWidth(SDNode *Load, ISD::LoadExtType ExtTy, EVT NewVT) const argument
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 575 ISD::LoadExtType ExtTy = Signed ? ISD::SEXTLOAD : ISD::ZEXTLOAD; local
577 ExtTy = ISD::EXTLOAD;
580 return DAG.getLoad(ISD::UNINDEXED, ExtTy,
|
| /external/llvm/include/llvm/Target/ |
| H A D | TargetLowering.h | 892 ISD::LoadExtType ExtTy,
891 shouldReduceLoadWidth(SDNode *Load, ISD::LoadExtType ExtTy, EVT NewVT) const argument
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 5334 ISD::LoadExtType ExtTy) {
5341 ID.AddInteger(encodeMemSDNodeFlags(ExtTy, ISD::UNINDEXED,
5352 ExtTy, MemVT, MMO);
5331 getMaskedLoad(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue Mask, SDValue Src0, EVT MemVT, MachineMemOperand *MMO, ISD::LoadExtType ExtTy) argument
|
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 2108 const EVT &ExtTy,
2110 // The vector originally had a size of OrigTy. It was then extended to ExtTy.
2111 // We expect the ExtTy to be 128-bits total. If the OrigTy is less than
2113 assert(ExtTy.is128BitVector() && "Unexpected extension size");
2106 addRequiredExtensionForVectorMULL(SDValue N, SelectionDAG &DAG, const EVT &OrigTy, const EVT &ExtTy, unsigned ExtOpcode) argument
|
| /external/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 6529 const EVT &ExtTy,
6531 // The vector originally had a size of OrigTy. It was then extended to ExtTy.
6532 // We expect the ExtTy to be 128-bits total. If the OrigTy is less than
6534 assert(ExtTy.is128BitVector() && "Unexpected extension size");
6527 AddRequiredExtensionForVMULL(SDValue N, SelectionDAG &DAG, const EVT &OrigTy, const EVT &ExtTy, unsigned ExtOpcode) argument
|