Searched refs:GPR32 (Results 1 - 4 of 4) sorted by relevance

/external/capstone/arch/AArch64/
H A DAArch64GenAsmWriter.inc7104 // (ADDSWrs WZR, GPR32:$src1, GPR32:$src2, 0)
7114 // (ADDSWrs WZR, GPR32:$src1, GPR32:$src2, arith_shift32:$sh)
7127 // (ADDSWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0)
7141 // (ADDSWrx WZR, GPR32sponly:$src1, GPR32:$src2, 16)
7151 // (ADDSWrx WZR, GPR32sp:$src1, GPR32:$src2, arith_extend:$sh)
7164 // (ADDSWrx GPR32
[all...]
H A DAArch64GenRegisterInfo.inc1104 // GPR32 Register Class...
1105 static MCPhysReg GPR32[] = {
1109 // GPR32 Bit set.
1499 { "GPR32", GPR32, GPR32Bits, 32, sizeof(GPR32Bits), AArch64_GPR32RegClassID, 4, 4, 1, 1 },
/external/llvm/lib/Target/SystemZ/
H A DSystemZFrameLowering.cpp122 unsigned GPR32 = RI->getSubReg(GPR64, SystemZ::subreg_l32); local
123 bool IsLive = MBB.isLiveIn(GPR64) || MBB.isLiveIn(GPR32);
/external/capstone/arch/Mips/
H A DMipsGenRegisterInfo.inc1076 // GPR32 Register Class...
1077 static MCPhysReg GPR32[] = {
1081 // GPR32 Bit set.
1485 { "GPR32", GPR32, GPR32Bits, 32, sizeof(GPR32Bits), Mips_GPR32RegClassID, 4, 4, 1, 1 },

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