Searched refs:GPR_REG (Results 1 - 4 of 4) sorted by relevance

/external/pcre/dist2/src/sljit/
H A DsljitNativeSPARC_common.c398 #define GPR_REG 0x0f macro
524 | ((flags & MEM_MASK) <= GPR_REG ? D(reg) : DA(reg))
526 ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) ? DR(reg) : MOVABLE_INS));
581 else if ((flags & LOAD_DATA) && ((flags & MEM_MASK) <= GPR_REG) && reg != base && reg != OFFS_REG(arg))
602 else if ((flags & LOAD_DATA) && ((flags & MEM_MASK) <= GPR_REG) && reg != base)
610 dest = ((flags & MEM_MASK) <= GPR_REG ? D(reg) : DA(reg));
611 delay_slot = ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) ? DR(reg) : MOVABLE_INS;
H A DsljitNativePPC_common.c529 #define GPR_REG 0x3f macro
722 ((inst) | (((flags) & MEM_MASK) <= GPR_REG ? D(reg) : FD(reg)))
726 (((inst) & ~(INT_ALIGNED | UPDATE_REQ)) | (((flags) & MEM_MASK) <= GPR_REG ? D(reg) : FD(reg)))
958 tmp_r = ((inp_flags & LOAD_DATA) && ((inp_flags) & MEM_MASK) <= GPR_REG) ? reg : TMP_REG1;
H A DsljitNativeMIPS_common.c501 #define GPR_REG 0x0f macro
710 | TA(reg_ar) | IMM(argw), ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) ? reg_ar : MOVABLE_INS));
752 if ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) {
H A DsljitNativeTILEGX_64.c85 #define GPR_REG 0xf macro
1350 if ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA))

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