Searched refs:MCInst_setOpcode (Results 1 - 15 of 15) sorted by relevance

/external/capstone/arch/XCore/
H A DXCoreDisassembler.c242 MCInst_setOpcode(Inst, XCore_STW_2rus);
245 MCInst_setOpcode(Inst, XCore_LDW_2rus);
248 MCInst_setOpcode(Inst, XCore_ADD_3r);
251 MCInst_setOpcode(Inst, XCore_SUB_3r);
254 MCInst_setOpcode(Inst, XCore_SHL_3r);
257 MCInst_setOpcode(Inst, XCore_SHR_3r);
260 MCInst_setOpcode(Inst, XCore_EQ_3r);
263 MCInst_setOpcode(Inst, XCore_AND_3r);
266 MCInst_setOpcode(Inst, XCore_OR_3r);
269 MCInst_setOpcode(Ins
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H A DXCoreGenDisassemblerTables.inc827 MCInst_setOpcode(MI, Opc); \
/external/capstone/arch/Mips/
H A DMipsDisassembler.c542 MCInst_setOpcode(MI, Mips_BOVC);
545 MCInst_setOpcode(MI, Mips_BEQC);
548 MCInst_setOpcode(MI, Mips_BEQZALC);
578 MCInst_setOpcode(MI, Mips_BNVC);
581 MCInst_setOpcode(MI, Mips_BNEC);
584 MCInst_setOpcode(MI, Mips_BNEZALC);
617 MCInst_setOpcode(MI, Mips_BLEZC);
619 MCInst_setOpcode(MI, Mips_BGEZC);
622 MCInst_setOpcode(MI, Mips_BGEC);
658 MCInst_setOpcode(M
[all...]
H A DMipsGenDisassemblerTables.inc6567 MCInst_setOpcode(MI, Opc); \
/external/capstone/arch/ARM/
H A DARMDisassembler.c1923 MCInst_setOpcode(Inst, ARM_RFEDA);
1926 MCInst_setOpcode(Inst, ARM_RFEDA_UPD);
1929 MCInst_setOpcode(Inst, ARM_RFEDB);
1932 MCInst_setOpcode(Inst, ARM_RFEDB_UPD);
1935 MCInst_setOpcode(Inst, ARM_RFEIA);
1938 MCInst_setOpcode(Inst, ARM_RFEIA_UPD);
1941 MCInst_setOpcode(Inst, ARM_RFEIB);
1944 MCInst_setOpcode(Inst, ARM_RFEIB_UPD);
1947 MCInst_setOpcode(Inst, ARM_SRSDA);
1950 MCInst_setOpcode(Ins
[all...]
H A DARMGenDisassemblerTables.inc13513 MCInst_setOpcode(MI, Opc); \
H A DARMInstPrinter.c678 MCInst_setOpcode(&NewMI, Opcode);
/external/capstone/
H A DMCInst.h118 void MCInst_setOpcode(MCInst *inst, unsigned Op);
H A DMCInst.c44 void MCInst_setOpcode(MCInst *inst, unsigned Op) function
/external/capstone/arch/X86/
H A DX86Disassembler.c234 MCInst_setOpcode(mcInst, NewOpc);
269 MCInst_setOpcode(mcInst, NewOpc);
690 MCInst_setOpcode(mcInst, insn->instructionID);
698 MCInst_setOpcode(mcInst, X86_XRELEASE_PREFIX);
700 MCInst_setOpcode(mcInst, X86_XACQUIRE_PREFIX);
H A DX86Mapping.c47805 MCInst_setOpcode(MI, X86_MULSDrr);
47818 MCInst_setOpcode(MI, X86_MULSDrr);
47840 MCInst_setOpcode(MI, X86_MULSSrr);
47853 MCInst_setOpcode(MI, X86_MULSSrr);
/external/capstone/arch/Sparc/
H A DSparcGenDisassemblerTables.inc2006 MCInst_setOpcode(MI, Opc); \
/external/capstone/arch/PowerPC/
H A DPPCGenDisassemblerTables.inc3255 MCInst_setOpcode(MI, Opc); \
/external/capstone/arch/AArch64/
H A DAArch64GenDisassemblerTables.inc12728 MCInst_setOpcode(MI, Opc); \
/external/capstone/arch/SystemZ/
H A DSystemZGenDisassemblerTables.inc2997 MCInst_setOpcode(MI, Opc); \

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