/external/swiftshader/third_party/LLVM/lib/Target/ARM/InstPrinter/ |
H A D | ARMInstPrinter.cpp | 61 const MCOperand &MO1 = MI->getOperand(1); local 70 << ", " << getRegisterName(MO1.getReg()); 81 const MCOperand &MO1 = MI->getOperand(1); local 89 << ", " << getRegisterName(MO1.getReg()); 226 const MCOperand &MO1 = MI->getOperand(OpNum); local 227 if (MO1.isExpr()) 228 O << *MO1.getExpr(); 229 else if (MO1.isImm()) 230 O << "[pc, #" << MO1.getImm() << "]"; 242 const MCOperand &MO1 local 260 const MCOperand &MO1 = MI->getOperand(OpNum); local 280 const MCOperand &MO1 = MI->getOperand(Op); local 308 const MCOperand &MO1 = MI->getOperand(Op); local 333 const MCOperand &MO1 = MI->getOperand(Op); local 341 const MCOperand &MO1 = MI->getOperand(Op); local 349 const MCOperand &MO1 = MI->getOperand(Op); local 369 const MCOperand &MO1 = MI->getOperand(OpNum); local 395 const MCOperand &MO1 = MI->getOperand(Op); local 415 const MCOperand &MO1 = MI->getOperand(Op); local 449 const MCOperand &MO1 = MI->getOperand(OpNum); local 474 const MCOperand &MO1 = MI->getOperand(OpNum); local 498 const MCOperand &MO1 = MI->getOperand(OpNum); local 520 const MCOperand &MO1 = MI->getOperand(OpNum); local 533 const MCOperand &MO1 = MI->getOperand(OpNum); local 761 const MCOperand &MO1 = MI->getOperand(Op); local 779 const MCOperand &MO1 = MI->getOperand(Op); local 822 const MCOperand &MO1 = MI->getOperand(OpNum); local 838 const MCOperand &MO1 = MI->getOperand(OpNum); local [all...] |
/external/llvm/lib/Target/ARM/InstPrinter/ |
H A D | ARMInstPrinter.cpp | 81 const MCOperand &MO1 = MI->getOperand(1); local 92 printRegName(O, MO1.getReg()); 104 const MCOperand &MO1 = MI->getOperand(1); local 114 printRegName(O, MO1.getReg()); 315 const MCOperand &MO1 = MI->getOperand(OpNum); local 316 if (MO1.isExpr()) { 317 MO1.getExpr()->print(O, &MAI); 323 int32_t OffImm = (int32_t)MO1.getImm(); 345 const MCOperand &MO1 = MI->getOperand(OpNum); 349 printRegName(O, MO1 [all...] |
/external/llvm/lib/Target/X86/ |
H A D | X86OptimizeLEAs.cpp | 55 static inline bool isIdenticalOp(const MachineOperand &MO1, 60 static bool isSimilarDispOp(const MachineOperand &MO1, 181 static inline bool isIdenticalOp(const MachineOperand &MO1, argument 183 return MO1.isIdenticalTo(MO2) && 184 (!MO1.isReg() || 185 !TargetRegisterInfo::isPhysicalRegister(MO1.getReg())); 195 static bool isSimilarDispOp(const MachineOperand &MO1, argument 197 assert(isValidDispOp(MO1) && isValidDispOp(MO2) && 199 return (MO1.isImm() && MO2.isImm()) || 200 (MO1 [all...] |
H A D | X86FloatingPoint.cpp | 1399 const MachineOperand &MO1 = MI.getOperand(1); local 1401 bool KillsSrc = MI.killsRegister(MO1.getReg()); 1405 unsigned SrcFP = getFPReg(MO1);
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H A D | X86InstrInfo.cpp | 6452 MachineOperand &MO1 = DataMI->getOperand(1); local 6453 if (MO1.getImm() == 0) { 6466 MO1.ChangeToRegister(MO0.getReg(), false);
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMMCCodeEmitter.cpp | 434 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); local 438 int32_t SImm = MO1.getImm(); 690 const MCOperand &MO1 = MI.getOperand(OpIdx); local 692 unsigned Rn = getARMRegisterNumbering(MO1.getReg()); 823 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); local 825 unsigned Imm8 = MO1.getImm(); 894 const MCOperand &MO1 = MI.getOperand(OpIdx+1); local 897 unsigned Rm = getARMRegisterNumbering(MO1.getReg()); 940 const MCOperand &MO1 = MI.getOperand(OpIdx+1); local 941 unsigned Imm = MO1 961 const MCOperand &MO1 = MI.getOperand(OpIdx+1); local 974 const MCOperand &MO1 = MI.getOperand(OpIdx+1); local 994 const MCOperand &MO1 = MI.getOperand(OpIdx+1); local 1013 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); local 1030 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); local 1099 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); local 1144 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); local 1182 const MCOperand &MO1 = MI.getOperand(OpNum); local 1200 const MCOperand &MO1 = MI.getOperand(OpNum); local 1221 const MCOperand &MO1 = MI.getOperand(OpNum); local 1237 const MCOperand &MO1 = MI.getOperand(OpNum); local 1262 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); local [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
H A D | X86CodeEmitter.cpp | 826 const MachineOperand &MO1 = MI.getOperand(CurOp++); 828 if (MO1.isImm()) { 829 emitConstant(MO1.getImm(), Size); 840 if (MO1.isGlobal()) { 841 bool Indirect = gvNeedsNonLazyPtr(MO1, TM); 842 emitGlobalAddress(MO1.getGlobal(), rt, MO1.getOffset(), 0, 844 } else if (MO1.isSymbol()) 845 emitExternalSymbolAddress(MO1.getSymbolName(), rt); 846 else if (MO1 [all...] |
H A D | X86FloatingPoint.cpp | 1320 const MachineOperand &MO1 = MI->getOperand(1); 1323 unsigned SrcST = MO1.getReg() - X86::ST0; 1324 bool KillsSrc = MI->killsRegister(MO1.getReg()); 1328 unsigned SrcFP = getFPReg(MO1); 1381 unsigned SrcFP = getFPReg(MO1);
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H A D | X86InstrInfo.cpp | 2973 MachineOperand &MO1 = DataMI->getOperand(1); local 2974 if (MO1.getImm() == 0) { 2986 MO1.ChangeToRegister(MO0.getReg(), false);
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMMCCodeEmitter.cpp | 555 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); local 559 int32_t SImm = MO1.getImm(); 863 const MCOperand &MO1 = MI.getOperand(OpIdx); local 865 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); 1003 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); local 1005 unsigned Imm8 = MO1.getImm(); 1070 const MCOperand &MO1 = MI.getOperand(OpIdx+1); local 1073 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); 1107 const MCOperand &MO1 = MI.getOperand(OpIdx+1); local 1108 unsigned Imm = MO1 1129 const MCOperand &MO1 = MI.getOperand(OpIdx+1); local 1143 const MCOperand &MO1 = MI.getOperand(OpIdx+1); local 1164 const MCOperand &MO1 = MI.getOperand(OpIdx+1); local 1197 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); local 1215 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); local 1327 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); local 1373 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); local [all...] |
/external/capstone/arch/ARM/ |
H A D | ARMInstPrinter.c | 445 MCOperand *MO1 = MCInst_getOperand(MI, 1); local 462 printRegName(MI->csh, O, MCOperand_getReg(MO1)); 466 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MO1); 484 MCOperand *MO1 = MCInst_getOperand(MI, 1); local 500 printRegName(MI->csh, O, MCOperand_getReg(MO1)); 503 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MO1); 795 MCOperand *MO1 = MCInst_getOperand(MI, OpNum); local 800 OffImm = (int32_t)MCOperand_getImm(MO1); 834 MCOperand *MO1 = MCInst_getOperand(MI, OpNum); local 839 printRegName(MI->csh, O, MCOperand_getReg(MO1)); 865 MCOperand *MO1 = MCInst_getOperand(MI, OpNum); local 888 MCOperand *MO1 = MCInst_getOperand(MI, Op); local 938 MCOperand *MO1 = MCInst_getOperand(MI, Op); local 955 MCOperand *MO1 = MCInst_getOperand(MI, Op); local 976 MCOperand *MO1 = MCInst_getOperand(MI, Op); local 988 MCOperand *MO1 = MCInst_getOperand(MI, OpNum); local 1029 MCOperand *MO1 = MCInst_getOperand(MI, Op); local 1082 MCOperand *MO1 = MCInst_getOperand(MI, Op); local 1093 MCOperand *MO1 = MCInst_getOperand(MI, OpNum); local 1145 MCOperand *MO1 = MCInst_getOperand(MI, OpNum); local 1180 MCOperand *MO1 = MCInst_getOperand(MI, OpNum); local 1226 MCOperand *MO1 = MCInst_getOperand(MI, OpNum); local 1250 MCOperand *MO1 = MCInst_getOperand(MI, OpNum); local 1766 MCOperand *MO1 = MCInst_getOperand(MI, Op); local 1794 MCOperand *MO1 = MCInst_getOperand(MI, Op); local 1849 MCOperand *MO1 = MCInst_getOperand(MI, OpNum); local 1869 MCOperand *MO1 = MCInst_getOperand(MI, OpNum); local 1918 MCOperand *MO1 = MCInst_getOperand(MI, OpNum); local 1954 MCOperand *MO1 = MCInst_getOperand(MI, OpNum); local 1995 MCOperand *MO1 = MCInst_getOperand(MI, OpNum); local 2021 MCOperand *MO1 = MCInst_getOperand(MI, OpNum); local 2054 MCOperand *MO1 = MCInst_getOperand(MI, OpNum); local 2090 MCOperand *MO1 = MCInst_getOperand(MI, OpNum); local [all...] |
/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ExpandPseudoInsts.cpp | 837 const MachineOperand &MO1 = MI.getOperand(1); 838 unsigned Flags = MO1.getTargetFlags(); 846 if (MO1.isGlobal()) { 847 MIB1.addGlobalAddress(MO1.getGlobal(), 0, Flags | AArch64II::MO_PAGE); 848 MIB2.addGlobalAddress(MO1.getGlobal(), 0, 850 } else if (MO1.isSymbol()) { 851 MIB1.addExternalSymbol(MO1.getSymbolName(), Flags | AArch64II::MO_PAGE); 852 MIB2.addExternalSymbol(MO1.getSymbolName(), 855 assert(MO1.isCPI() && 857 MIB1.addConstantPoolIndex(MO1 [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
H A D | ARMCodeEmitter.cpp | 250 const MachineOperand &MO1 = MI.getOperand(Op + 1); local 256 int32_t Imm12 = MO1.getImm(); 292 const MachineOperand &MO1 = MI.getOperand(Op + 1); local 298 int32_t Imm12 = MO1.getImm(); 686 const MachineOperand &MO1 = MI.getOperand(1); local 691 unsigned Lo16 = getMovi32Value(MI, MO1, ARM::reloc_arm_movw) & 0xFFFF; 704 unsigned Hi16 = getMovi32Value(MI, MO1, ARM::reloc_arm_movt) >> 16; 722 const MachineOperand &MO1 = MI.getOperand(1); local 723 assert(MO1.isImm() && ARM_AM::isSOImmTwoPartVal(MO1 925 const MachineOperand &MO1 = MI.getOperand(OpIdx + 1); local [all...] |
H A D | ARMExpandPseudoInsts.cpp | 923 const MachineOperand &MO1 = MI.getOperand(1); local 924 const GlobalValue *GV = MO1.getGlobal(); 925 unsigned TF = MO1.getTargetFlags(); 939 .addGlobalAddress(GV, MO1.getOffset(), TF | LO16TF) 944 .addGlobalAddress(GV, MO1.getOffset(), TF | HI16TF)
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H A D | ARMAsmPrinter.cpp | 906 const MachineOperand &MO1 = MI->getOperand(OpNum); local 908 unsigned JTI = MO1.getIndex(); 950 const MachineOperand &MO1 = MI->getOperand(OpNum); local 952 unsigned JTI = MO1.getIndex();
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H A D | ARMBaseInstrInfo.cpp | 1182 const MachineOperand &MO1 = MI1->getOperand(1); local 1183 if (MO0.getOffset() != MO1.getOffset()) 1192 return MO0.getGlobal() == MO1.getGlobal(); 1197 int CPI1 = MO1.getIndex(); 1238 const MachineOperand &MO1 = MI1->getOperand(i); local 1239 if (!MO0.isIdenticalTo(MO1))
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/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
H A D | ProcessImplicitDefs.cpp | 66 MachineOperand &MO1 = MI->getOperand(1); local 67 if (MO1.getReg() != Reg)
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/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64MCCodeEmitter.cpp | 249 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); local 250 assert(AArch64_AM::getShiftType(MO1.getImm()) == AArch64_AM::LSL && 252 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm());
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonAsmPrinter.cpp | 412 MCOperand &MO1 = MappedInst.getOperand(1); local 413 unsigned High = RI->getSubReg(MO1.getReg(), Hexagon::subreg_hireg); 414 unsigned Low = RI->getSubReg(MO1.getReg(), Hexagon::subreg_loreg);
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/external/llvm/lib/Target/ARM/ |
H A D | ARMAsmPrinter.cpp | 1009 const MachineOperand &MO1 = MI->getOperand(1); local 1010 unsigned JTI = MO1.getIndex(); 1056 const MachineOperand &MO1 = MI->getOperand(1); local 1057 unsigned JTI = MO1.getIndex(); 1082 const MachineOperand &MO1 = MI->getOperand(1); local 1083 unsigned JTI = MO1.getIndex();
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H A D | ARMExpandPseudoInsts.cpp | 1272 const MachineOperand &MO1 = MI.getOperand(1); local 1273 const GlobalValue *GV = MO1.getGlobal(); 1325 const MachineOperand &MO1 = MI.getOperand(1); local 1326 const GlobalValue *GV = MO1.getGlobal(); 1327 unsigned TF = MO1.getTargetFlags(); 1338 .addGlobalAddress(GV, MO1.getOffset(), TF | LO16TF) 1343 .addGlobalAddress(GV, MO1.getOffset(), TF | HI16TF)
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H A D | ARMBaseInstrInfo.cpp | 1470 const MachineOperand &MO1 = MI1.getOperand(1); local 1471 if (MO0.getOffset() != MO1.getOffset()) 1481 return MO0.getGlobal() == MO1.getGlobal(); 1486 int CPI1 = MO1.getIndex(); 1527 const MachineOperand &MO1 = MI1.getOperand(i); local 1528 if (!MO0.isIdenticalTo(MO1))
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/external/llvm/lib/Target/AArch64/InstPrinter/ |
H A D | AArch64InstPrinter.cpp | 1178 const MCOperand MO1 = MI->getOperand(OpNum + 1); local 1180 if (MO1.isImm()) { 1181 O << ", #" << formatImm(MO1.getImm() * Scale); 1183 assert(MO1.isExpr() && "Unexpected operand type!"); 1185 MO1.getExpr()->print(O, &MAI);
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/external/llvm/lib/Target/Hexagon/AsmParser/ |
H A D | HexagonAsmParser.cpp | 1461 MCOperand &MO1, MCOperand &MO2) { 1465 TmpInst.addOperand(MO1); 1808 MCOperand &MO1 = Inst.getOperand(1); local 1816 Inst = makeCombineInst(Hexagon::A2_combineii, Rdd, MO1, MO2); 1823 MCOperand &MO1 = Inst.getOperand(1); local 1825 if (MO1.getExpr()->evaluateAsAbsolute(Value)) { 1831 Inst = makeCombineInst(Hexagon::A4_combineii, Rdd, MO1, MO2); 1460 makeCombineInst(int opCode, MCOperand &Rdd, MCOperand &MO1, MCOperand &MO2) argument
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