/external/v8/src/arm64/ |
H A D | decoder-arm64-inl.h | 132 (instr->Mask(0x01000010) == 0x00000010)) { 146 (instr->Mask(0x00E0001D) == 0x00200001) || 147 (instr->Mask(0x00E0001D) == 0x00400001) || 148 (instr->Mask(0x00E0001E) == 0x00200002) || 149 (instr->Mask(0x00E0001E) == 0x00400002) || 150 (instr->Mask(0x00E0001C) == 0x00600000) || 151 (instr->Mask(0x00E0001C) == 0x00800000) || 152 (instr->Mask(0x00E0001F) == 0x00A00000) || 153 (instr->Mask(0x00C0001C) == 0x00C00000)) { 160 const Instr masked_003FF0E0 = instr->Mask( [all...] |
H A D | instructions-arm64.h | 120 Instr Mask(uint32_t mask) const { function in class:v8::internal::Instruction 160 static_cast<LoadStorePairOp>(Mask(LoadStorePairMask))); 165 return Mask(ConditionalBranchFMask) == ConditionalBranchFixed; 169 return Mask(UnconditionalBranchFMask) == UnconditionalBranchFixed; 173 return Mask(CompareBranchFMask) == CompareBranchFixed; 177 return Mask(TestBranchFMask) == TestBranchFixed; 185 return Mask(LoadLiteralFMask) == LoadLiteralFixed; 189 return Mask(LoadLiteralMask) == LDR_x_lit; 193 return Mask(PCRelAddressingFMask) == PCRelAddressingFixed; 197 return Mask(PCRelAddressingMas [all...] |
H A D | disasm-arm64.cc | 57 switch (instr->Mask(AddSubImmediateMask)) { 101 switch (instr->Mask(AddSubShiftedMask)) { 149 switch (instr->Mask(AddSubExtendedMask)) { 184 switch (instr->Mask(AddSubWithCarryMask)) { 225 switch (instr->Mask(LogicalImmediateMask)) { 291 switch (instr->Mask(LogicalShiftedMask)) { 340 switch (instr->Mask(ConditionalCompareRegisterMask)) { 356 switch (instr->Mask(ConditionalCompareImmediateMask)) { 378 switch (instr->Mask(ConditionalSelectMask)) { 433 switch (instr->Mask(BitfieldMas [all...] |
H A D | instructions-arm64.cc | 17 if (Mask(LoadStoreAnyFMask) != LoadStoreAnyFixed) { 21 if (Mask(LoadStorePairAnyFMask) == LoadStorePairAnyFixed) { 22 return Mask(LoadStorePairLBit) != 0; 24 LoadStoreOp op = static_cast<LoadStoreOp>(Mask(LoadStoreOpMask)); 44 if (Mask(LoadStoreAnyFMask) != LoadStoreAnyFixed) { 48 if (Mask(LoadStorePairAnyFMask) == LoadStorePairAnyFixed) { 49 return Mask(LoadStorePairLBit) == 0; 51 LoadStoreOp op = static_cast<LoadStoreOp>(Mask(LoadStoreOpMask)); 244 SetInstructionBits(Mask(~ImmPCRel_mask) | imm); 283 SetInstructionBits(Mask(~imm_mas [all...] |
/external/vixl/src/aarch64/ |
H A D | decoder-aarch64.cc | 210 (instr->Mask(0x01000010) == 0x00000010)) { 224 (instr->Mask(0x00E0001D) == 0x00200001) || 225 (instr->Mask(0x00E0001D) == 0x00400001) || 226 (instr->Mask(0x00E0001E) == 0x00200002) || 227 (instr->Mask(0x00E0001E) == 0x00400002) || 228 (instr->Mask(0x00E0001C) == 0x00600000) || 229 (instr->Mask(0x00E0001C) == 0x00800000) || 230 (instr->Mask(0x00E0001F) == 0x00A00000) || 231 (instr->Mask(0x00C0001C) == 0x00C00000)) { 238 const Instr masked_003FF0E0 = instr->Mask( [all...] |
H A D | disasm-aarch64.cc | 72 switch (instr->Mask(AddSubImmediateMask)) { 119 switch (instr->Mask(AddSubShiftedMask)) { 170 switch (instr->Mask(AddSubExtendedMask)) { 210 switch (instr->Mask(AddSubWithCarryMask)) { 256 switch (instr->Mask(LogicalImmediateMask)) { 326 switch (instr->Mask(LogicalShiftedMask)) { 387 switch (instr->Mask(ConditionalCompareRegisterMask)) { 407 switch (instr->Mask(ConditionalCompareImmediateMask)) { 434 switch (instr->Mask(ConditionalSelectMask)) { 492 switch (instr->Mask(BitfieldMas [all...] |
/external/clang/include/clang/Basic/ |
H A D | Sanitizers.h | 52 return Mask & K; 56 bool hasOneOf(SanitizerMask K) const { return Mask & K; } 61 Mask = Value ? (Mask | K) : (Mask & ~K); 65 void clear() { Mask = 0; } 68 bool empty() const { return Mask == 0; } 71 SanitizerMask Mask = 0; member in struct:clang::SanitizerSet
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/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZTDC.cpp | 96 void converted(Instruction *I, Value *V, int Mask, bool Worthy) { argument 97 ConvertedInsts[I] = std::make_tuple(V, Mask, Worthy); 204 int Mask = 0; local 206 Mask |= Masks[WhichConst][0]; 208 Mask |= Masks[WhichConst][1]; 210 Mask |= Masks[WhichConst][2]; 212 Mask |= Masks[WhichConst][3]; 220 Mask &= SystemZ::TDCMASK_PLUS; 221 Mask |= Mask >> 246 int Mask; local 271 int Mask = MaskC->getZExtValue(); local 295 int Mask; local 351 int Mask; local [all...] |
/external/clang/include/clang/AST/ |
H A D | DeclAccessPair.h | 33 enum { Mask = 0x3 }; enumerator in enum:clang::DeclAccessPair::__anon1166 43 return reinterpret_cast<NamedDecl*>(~Mask & Ptr); 46 return AccessSpecifier(Mask & Ptr);
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/external/pdfium/core/fxge/ |
H A D | cfx_cliprgn.h | 29 void IntersectMaskF(int left, int top, const RetainPtr<CFX_DIBitmap>& Mask); 34 const RetainPtr<CFX_DIBitmap>& Mask);
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/external/tensorflow/tensorflow/core/lib/core/ |
H A D | bitmap.h | 72 static Word Mask(size_t i) { return 1ull << i; } function in class:tensorflow::core::Bitmap 90 return word_[i / kBits] & Mask(i % kBits); 95 word_[i / kBits] |= Mask(i % kBits); 100 word_[i / kBits] &= ~Mask(i % kBits);
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/external/tensorflow/tensorflow/core/lib/hash/ |
H A D | crc32c_test.cc | 65 TEST(CRC, Mask) { 67 ASSERT_NE(crc, Mask(crc)); 68 ASSERT_NE(crc, Mask(Mask(crc))); 69 ASSERT_EQ(crc, Unmask(Mask(crc))); 70 ASSERT_EQ(crc, Unmask(Unmask(Mask(Mask(crc)))));
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/external/swiftshader/third_party/LLVM/lib/Transforms/InstCombine/ |
H A D | InstCombineVectorOps.cpp | 251 std::vector<Constant*> &Mask) { 257 Mask.assign(NumElts, UndefValue::get(Type::getInt32Ty(V->getContext()))); 263 Mask.push_back(ConstantInt::get(Type::getInt32Ty(V->getContext()), i)); 269 Mask.push_back(ConstantInt::get(Type::getInt32Ty(V->getContext()), 287 if (CollectSingleShuffleElements(VecOp, LHS, RHS, Mask)) { 289 Mask[InsertedIdx] = UndefValue::get(Type::getInt32Ty(V->getContext())); 302 if (CollectSingleShuffleElements(VecOp, LHS, RHS, Mask)) { 305 Mask[InsertedIdx % NumElts] = 310 Mask[InsertedIdx % NumElts] = 328 static Value *CollectShuffleElements(Value *V, std::vector<Constant*> &Mask, argument 250 CollectSingleShuffleElements(Value *V, Value *LHS, Value *RHS, std::vector<Constant*> &Mask) argument 424 std::vector<Constant*> Mask; local 450 std::vector<int> Mask = getShuffleMask(&SVI); local [all...] |
/external/llvm/lib/CodeGen/ |
H A D | StackMapLivenessAnalysis.cpp | 155 uint32_t *Mask = createRegisterMask(MF); local 156 MachineOperand MO = MachineOperand::CreateRegLiveOut(Mask); 164 uint32_t *Mask = MF.allocateRegisterMask(TRI->getNumRegs()); local 166 Mask[Reg / 32] |= 1U << (Reg % 32); 169 TRI->adjustStackMapLiveOutMask(Mask); 171 return Mask;
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H A D | InterleavedAccessPass.cpp | 122 static bool isDeInterleaveMaskOfFactor(ArrayRef<int> Mask, unsigned Factor, argument 130 for (; i < Mask.size(); i++) 131 if (Mask[i] >= 0 && static_cast<unsigned>(Mask[i]) != Index + i * Factor) 134 if (i == Mask.size()) 146 static bool isDeInterleaveMask(ArrayRef<int> Mask, unsigned &Factor, argument 148 if (Mask.size() < 2) 153 if (isDeInterleaveMaskOfFactor(Mask, Factor, Index)) 165 static bool isReInterleaveMask(ArrayRef<int> Mask, unsigned &Factor) { argument 166 unsigned NumElts = Mask [all...] |
/external/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineVectorOps.cpp | 298 SmallVectorImpl<Constant*> &Mask) { 304 Mask.assign(NumElts, UndefValue::get(Type::getInt32Ty(V->getContext()))); 310 Mask.push_back(ConstantInt::get(Type::getInt32Ty(V->getContext()), i)); 316 Mask.push_back(ConstantInt::get(Type::getInt32Ty(V->getContext()), 334 if (collectSingleShuffleElements(VecOp, LHS, RHS, Mask)) { 336 Mask[InsertedIdx] = UndefValue::get(Type::getInt32Ty(V->getContext())); 349 if (collectSingleShuffleElements(VecOp, LHS, RHS, Mask)) { 352 Mask[InsertedIdx % NumElts] = 357 Mask[InsertedIdx % NumElts] = 443 /// left and right vectors of the proposed shuffle (or 0), and set the Mask 297 collectSingleShuffleElements(Value *V, Value *LHS, Value *RHS, SmallVectorImpl<Constant*> &Mask) argument 450 collectShuffleElements(Value *V, SmallVectorImpl<Constant *> &Mask, Value *PermittedRHS, InstCombiner &IC) argument 603 SmallVector<Constant*, 16> Mask; local 633 CanEvaluateShuffled(Value *V, ArrayRef<int> Mask, unsigned Depth = 5) argument 786 EvaluateInDifferentElementOrder(Value *V, ArrayRef<int> Mask) argument 884 recognizeIdentityMask(const SmallVectorImpl<int> &Mask, bool &isLHSID, bool &isRHSID) argument 904 isShuffleExtractingFromLHS(ShuffleVectorInst &SVI, SmallVector<int, 16> &Mask) argument 922 SmallVector<int, 16> Mask = SVI.getShuffleMask(); local [all...] |
/external/llvm/lib/Support/Windows/ |
H A D | WindowsSupport.h | 61 DWORDLONG Mask = 0; local 62 Mask = VerSetConditionMask(Mask, VER_MAJORVERSION, VER_GREATER_EQUAL); 63 Mask = VerSetConditionMask(Mask, VER_MINORVERSION, VER_GREATER_EQUAL); 64 Mask = VerSetConditionMask(Mask, VER_SERVICEPACKMAJOR, VER_GREATER_EQUAL); 68 Mask) != FALSE;
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/external/mesa3d/src/gallium/drivers/swr/rasterizer/common/ |
H A D | os.h | 167 unsigned char _BitScanForward(unsigned long *Index, unsigned long Mask) argument 169 *Index = __builtin_ctz(Mask); 170 return (Mask != 0); 174 unsigned char _BitScanForward(unsigned int *Index, unsigned int Mask) argument 176 *Index = __builtin_ctz(Mask); 177 return (Mask != 0); 181 unsigned char _BitScanReverse(unsigned long *Index, unsigned long Mask) argument 183 *Index = __builtin_clz(Mask); 184 return (Mask != 0); 188 unsigned char _BitScanReverse(unsigned int *Index, unsigned int Mask) argument [all...] |
/external/swiftshader/third_party/LLVM/lib/Support/ |
H A D | Memory.cpp | 57 const intptr_t Mask = ~(LineSize - 1); 58 const intptr_t StartLine = ((intptr_t) Addr) & Mask; 59 const intptr_t EndLine = ((intptr_t) Addr + Len + LineSize - 1) & Mask;
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/external/swiftshader/third_party/LLVM/lib/Analysis/ |
H A D | AliasAnalysis.cpp | 83 ModRefResult Mask = ModRef; 85 Mask = Ref; 109 if ((Mask & Mod) && pointsToConstantMemory(Loc)) 110 Mask = ModRefResult(Mask & ~Mod); 113 if (!AA) return Mask; 117 return ModRefResult(AA->getModRefInfo(CS, Loc) & Mask); 135 AliasAnalysis::ModRefResult Mask = ModRef; 140 Mask = ModRefResult(Mask [all...] |
H A D | ValueTracking.cpp | 44 /// ComputeMaskedBits - Determine which of the bits specified in Mask are 46 /// bit sets. This code only analyzes bits in Mask, in order to short-circuit 60 void llvm::ComputeMaskedBits(Value *V, const APInt &Mask, argument 65 unsigned BitWidth = Mask.getBitWidth(); 74 "V, Mask, KnownOne and KnownZero should have same BitWidth"); 78 KnownOne = CI->getValue() & Mask; 79 KnownZero = ~KnownOne & Mask; 86 KnownZero = Mask; 95 ComputeMaskedBits(CV->getOperand(i), Mask, KnownZero2, KnownOne2, 116 KnownZero = Mask 427 APInt Mask = APInt::getLowBitsSet(BitWidth, LHSKnownZeroOut); local 438 APInt Mask = APInt::getLowBitsSet(BitWidth, RHSKnownZeroOut); local 835 APInt Mask = APInt::getSignedMaxValue(BitWidth); local 878 MaskedValueIsZero(Value *V, const APInt &Mask, const TargetData *TD, unsigned Depth) argument 974 APInt Mask = APInt::getAllOnesValue(TyBits); local 1001 APInt Mask = APInt::getAllOnesValue(TyBits); local 1048 APInt Mask = APInt::getAllOnesValue(TyBits); local [all...] |
/external/llvm/include/llvm/ADT/ |
H A D | SmallBitVector.h | 224 // Mask off previous bits. 303 uintptr_t Mask = EMask - IMask; local 304 setSmallBits(getSmallBits() | Mask); 334 uintptr_t Mask = EMask - IMask; local 335 setSmallBits(getSmallBits() & ~Mask); 512 /// Add '1' bits from Mask to this vector. Don't resize. 513 /// This computes "*this |= Mask". 514 void setBitsInMask(const uint32_t *Mask, unsigned MaskWords = ~0u) { argument 516 applyMask<true, false>(Mask, MaskWords); 518 getPointer()->setBitsInMask(Mask, MaskWord 523 clearBitsInMask(const uint32_t *Mask, unsigned MaskWords = ~0u) argument 532 setBitsNotInMask(const uint32_t *Mask, unsigned MaskWords = ~0u) argument 541 clearBitsNotInMask(const uint32_t *Mask, unsigned MaskWords = ~0u) argument 550 applyMask(const uint32_t *Mask, unsigned MaskWords) argument [all...] |
/external/llvm/lib/Analysis/ |
H A D | CostModel.cpp | 92 static bool isReverseVectorMask(SmallVectorImpl<int> &Mask) { argument 93 for (unsigned i = 0, MaskSize = Mask.size(); i < MaskSize; ++i) 94 if (Mask[i] > 0 && Mask[i] != (int)(MaskSize - 1 - i)) 99 static bool isAlternateVectorMask(SmallVectorImpl<int> &Mask) { argument 101 unsigned MaskSize = Mask.size(); 105 if (Mask[i] < 0) 107 isAlternate = Mask[i] == (int)((i & 1) ? MaskSize + i : i); 116 if (Mask[i] < 0) 118 isAlternate = Mask[ 364 SmallVector<int, 16> Mask = Shuffle->getShuffleMask(); local 488 SmallVector<int, 16> Mask = Shuffle->getShuffleMask(); local [all...] |
/external/llvm/utils/PerfectShuffle/ |
H A D | PerfectShuffle.cpp | 28 // Mask manipulation functions. 35 static unsigned getMaskElt(unsigned Mask, unsigned Elt) { argument 36 return (Mask >> ((3-Elt)*4)) & 0xF; 39 static unsigned setMaskElt(unsigned Mask, unsigned Elt, unsigned NewVal) { argument 41 return (Mask & ~(0xF << FieldShift)) | (NewVal << FieldShift); 45 static bool isValidMask(unsigned short Mask) { argument 46 unsigned short UndefBits = Mask & 0x8888; 47 return (Mask & ((UndefBits >> 1)|(UndefBits>>2)|(UndefBits>>3))) == 0; 52 static bool hasUndefElements(unsigned short Mask) { argument 53 return (Mask 58 isOnlyLHSMask(unsigned short Mask) argument 73 getCompressedMask(unsigned short Mask) argument [all...] |
/external/swiftshader/third_party/LLVM/utils/PerfectShuffle/ |
H A D | PerfectShuffle.cpp | 28 // Mask manipulation functions. 35 static unsigned getMaskElt(unsigned Mask, unsigned Elt) { argument 36 return (Mask >> ((3-Elt)*4)) & 0xF; 39 static unsigned setMaskElt(unsigned Mask, unsigned Elt, unsigned NewVal) { argument 41 return (Mask & ~(0xF << FieldShift)) | (NewVal << FieldShift); 45 static bool isValidMask(unsigned short Mask) { argument 46 unsigned short UndefBits = Mask & 0x8888; 47 return (Mask & ((UndefBits >> 1)|(UndefBits>>2)|(UndefBits>>3))) == 0; 52 static bool hasUndefElements(unsigned short Mask) { argument 53 return (Mask 58 isOnlyLHSMask(unsigned short Mask) argument 73 getCompressedMask(unsigned short Mask) argument [all...] |