Searched refs:R12 (Results 1 - 25 of 100) sorted by relevance

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/external/boringssl/src/ssl/test/runner/curve25519/
H A Dfreeze_amd64.s26 MOVQ SI,R12
27 SHRQ $51,R12
29 ADDQ R12,DX
30 MOVQ DX,R12
31 SHRQ $51,R12
33 ADDQ R12,CX
34 MOVQ CX,R12
35 SHRQ $51,R12
37 ADDQ R12,R8
38 MOVQ R8,R12
[all...]
H A Dmul_amd64.s41 MOVQ AX,R12
57 ADDQ AX,R12
74 ADDQ AX,R12
108 ADDQ AX,R12
120 ADDQ AX,R12
132 SHLQ $13,R13:R12
133 ANDQ SI,R12
134 ADDQ R11,R12
149 ADDQ R12,DX
H A Dladderstep_amd64.s24 MOVQ R8,R12
29 ADDQ ·_2P1234(SB),R12
39 SUBQ 104(DI),R12
49 MOVQ R12,64(SP)
68 MOVQ AX,R12
82 ADDQ AX,R12
121 ADDQ AX,R12
132 SHLQ $13,R13:R12
133 ANDQ DX,R12
134 ADDQ R11,R12
[all...]
H A Dsquare_amd64.s30 MOVQ DX,R12
44 ADCQ DX,R12
83 ADCQ DX,R12
95 SHLQ $13,R12:R11
100 ADDQ R12,R13
/external/libxaac/decoder/armv7/
H A Dixheaacd_cos_sin_mod.s40 STMFD SP!, {R4-R12, R14}
54 AND R12, R10, #7
55 CMP R12, #0
93 SMULWT R12, R1, R2
100 QSUB R12, R12, R6
106 STR R12, [R10, #4]
110 SMULWB R12, R1, R2
115 QSUB R12, R12, R
[all...]
H A Dixheaacd_enery_calc_per_subband.s34 SUB R12, R3, R2
83 LDR R12, [R8], #0x100
86 EOR R12, R12, R12, ASR #31
88 ORRGE R6, R6, R12
102 LDR R12, [R8], #0x100
106 MOV R12, R12, ASR R14
107 SMLABB R6, R12, R1
[all...]
H A Dixheaacd_sbr_qmfsyn64_winadd.s28 STMFD sp!, {R4-R12, R14}
35 MOV R12, R2
50 ADD R12, R12, R6
90 VLD1.16 D11, [R12]!
95 MOV R11, R12
97 ADD R12, R12, #248
100 VLD1.16 D13, [R12], R9
105 VLD1.16 D15, [R12], R
[all...]
H A Dixheaacd_conv_ergtoamplitudelp.s37 MOV R12, #0
52 LDRH R12, [R6, R5]
55 SMULWBNE R12, R12, R11
128 MOV R12, R12, LSL R6
129 CMP R12, #0x8000
130 MVNGE R12, #0x8000
131 CMNLT R12, #0x00008000
132 MOVLT R12, #
[all...]
H A Dixheaacd_apply_rot.s27 STMFD SP!, {R4-R12, R14}
74 LDR R12, [R0, #44]
80 LDR R5, [R12]
82 LDR R6, [R12, #0x80]
94 STR R5, [R12], #4
96 STR R14, [R12, #0x7c]
98 LDR R5, [R12, #0x3c]
99 LDR R6, [R12, #0xbc]
111 STR R5, [R12, #0x3c]
113 STR R14, [R12, #
[all...]
H A Dixheaacd_esbr_qmfsyn64_winadd.s19 STMFD sp!, {R4-R12, R14}
25 MOV R12, R2
37 ADD R12, R12, R6
84 VLD1.32 {D2, D3}, [R12]!
86 MOV R11, R12
91 ADD R12, R12, #496
93 VLD1.32 {D6, D7}, [R12], R9
99 VLD1.32 {D10, D11}, [R12], R
[all...]
H A Dia_xheaacd_mps_mulshift.s28 STMFD sp!, {R4-R12}
44 LDMFD sp!, {R4-R12}
H A Dixheaacd_overlap_add2.s28 STMFD sp!, {R4-R12, R14}
44 SUB R12, R5, #1
46 MOV R12, R12, LSL #2
48 ADD R7, R1, R12
53 MOV R12, #-16
54 VLD2.16 {D6, D7}, [R7], R12
70 VLD2.16 {D14, D15}, [R7], R12
83 VLD2.16 {D6, D7}, [R7], R12
104 VLD2.16 {D14, D15}, [R7], R12
[all...]
H A Dixheaacd_tns_parcor2lpc_32x16.s26 STMFD SP!, {R2, R4-R12, R14}
51 MOV R12, R3
67 SUBS R12, R12, #1
75 MOV R12, R3
95 SUBS R12, R12, #1
H A Dixheaacd_calcmaxspectralline.s28 STMFD sp!, {R4-R12, R14}
77 LDMFD sp!, {R4-R12, R15}
H A Dixheaacd_conv_ergtoamplitude.s38 MOV R12, #0
51 LDRH R12, [R11, R5]
55 SMULWBNE R12, R12, R10
60 STRH R12, [R2, #-4]
H A Dixheaacd_overlap_add1.s29 STMFD sp!, {R4-R12, R14}
43 MOV R12, #0
44 VDUP.S16 D12, R12
45 MOV R12, #-16
47 VLD1.32 {D6, D7}, [R10], R12
58 VLD2.16 {D2, D3}, [R8], R12
96 VLD1.32 {D6, D7}, [R10], R12
113 VLD2.16 {D2, D3}, [R8], R12
140 VLD1.32 {D6, D7}, [R10], R12
160 VLD2.16 {D2, D3}, [R8], R12
[all...]
H A Dixheaacd_post_twiddle_overlap.s28 STMFD sp!, {R4-R12}
65 SMULWB R12, R9, R10
68 SUB R8, R12, R11
73 MOV R12, #-50
75 SMULWB R11, R8, R12
87 SMULWT R12, R8, R10
109 MOVS R8, R12, ASR R9
111 MOVLT R12, #0x80000000
112 MVNGT R12, #0x80000000
113 MOVEQ R12, R1
[all...]
/external/boringssl/src/ssl/test/runner/poly1305/
H A Dsum_arm.s35 MOVW R5>>8, R12
44 AND R12, R6, R6
75 ADD $24, R13, R12
76 MOVM.IB [R4-R8, R14], (R12)
81 MOVW R2, R12
90 CMP $16, R12
111 MOVW R2>>14, R12
116 ORR R3<<18, R12, R12
121 BIC $0xfc000000, R12, R1
[all...]
H A Dsum_amd64.s69 MOVQ 8(AX), R12
71 ANDQ ·poly1305Mask<>+8(SB), R12 // r1
83 POLY1305_MUL(R8, R9, R10, R11, R12, BX, CX, R13, R14)
/external/strace/linux/x86_64/
H A Duserent.h4 XLAT(8*R12),
/external/kernel-headers/original/uapi/asm-x86/asm/
H A Dptrace-abi.h36 #define R12 24 macro
/external/libunwind/src/x86_64/
H A DGget_save_loc.c43 case UNW_X86_64_R12: loc = c->dwarf.loc[R12]; break;
H A Dunwind_i.h51 #define R12 12 macro
H A Dinit.h61 c->dwarf.loc[R12] = REG_INIT_LOC(c, r12, R12);
/external/llvm/lib/Target/Lanai/MCTargetDesc/
H A DLanaiBaseInfo.h73 case Lanai::R12:

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