Searched refs:SRsrc (Results 1 - 2 of 2) sorted by relevance
/external/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelDAGToDAG.cpp | 92 bool SelectMUBUF(SDValue Addr, SDValue &SRsrc, SDValue &VAddr, 96 bool SelectMUBUFAddr64(SDValue Addr, SDValue &SRsrc, SDValue &VAddr, 99 bool SelectMUBUFAddr64(SDValue Addr, SDValue &SRsrc, 104 bool SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, SDValue &SOffset, 107 bool SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, SDValue &Soffset, 109 bool SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, SDValue &Soffset, 868 bool AMDGPUDAGToDAGISel::SelectMUBUFAddr64(SDValue Addr, SDValue &SRsrc, argument 889 SRsrc = SDValue(Lowering.wrapAddr64Rsrc(*CurDAG, DL, Ptr), 0); 896 bool AMDGPUDAGToDAGISel::SelectMUBUFAddr64(SDValue Addr, SDValue &SRsrc, argument 903 return SelectMUBUFAddr64(Addr, SRsrc, VAdd 937 SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, SDValue &SOffset, SDValue &Offset, SDValue &GLC, SDValue &SLC, SDValue &TFE) const argument 965 SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, SDValue &Soffset, SDValue &Offset ) const argument 972 SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, SDValue &Soffset, SDValue &Offset, SDValue &SLC) const argument 1378 SDValue SRsrc, VAddr, SOffset, Offset, GLC, SLC; local 1396 SDValue SRsrc, SOffset, Offset, SLC; local [all...] |
H A D | SIInstrInfo.cpp | 2327 MachineOperand *SRsrc = getNamedOperand(MI, AMDGPU::OpName::srsrc); 2328 if (SRsrc && !RI.isSGPRClass(MRI.getRegClass(SRsrc->getReg()))) { 2329 unsigned SGPR = readlaneVGPRToSGPR(SRsrc->getReg(), MI, MRI); 2330 SRsrc->setReg(SGPR); 2348 MachineOperand *SRsrc = &MI.getOperand(SRsrcIdx); 2350 if (RI.getCommonSubClass(MRI.getRegClass(SRsrc->getReg()), 2360 unsigned SRsrcPtr = buildExtractSubReg(MI, MRI, *SRsrc, 2441 .addOperand(*SRsrc) 2468 .addOperand(*SRsrc) [all...] |
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