Searched refs:ShiftVal (Results 1 - 18 of 18) sorted by relevance

/external/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64MCCodeEmitter.cpp252 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); local
253 assert((ShiftVal == 0 || ShiftVal == 12) &&
256 return MO.getImm() | (ShiftVal == 0 ? 0 : (1 << 12));
503 unsigned ShiftVal = AArch64_AM::getShiftValue(MO.getImm()); local
504 assert((ShiftVal == 8 || ShiftVal == 16) && "Invalid shift amount!");
505 return ShiftVal == 8 ? 0 : 1;
/external/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.cpp55 for (unsigned ShiftVal = 0; ShiftVal < BitSize; ShiftVal += 64) {
56 APInt Tmp = ImmVal.ashr(ShiftVal).sextOrTrunc(64);
H A DAArch64FastISel.cpp1183 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); local
1189 RHSIsKill, AArch64_AM::LSL, ShiftVal, SetFlags,
1207 uint64_t ShiftVal = C->getZExtValue(); local
1214 RHSIsKill, ShiftType, ShiftVal, SetFlags,
1561 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); local
1568 RHSIsKill, ShiftVal);
1578 uint64_t ShiftVal = C->getZExtValue(); local
1584 RHSIsKill, ShiftVal);
4523 uint64_t ShiftVal = C->getValue().logBase2(); local
4552 emitLSL_ri(VT, SrcVT, Src0Reg, Src0IsKill, ShiftVal, IsZEx
4589 uint64_t ShiftVal = C->getZExtValue(); local
[all...]
H A DAArch64ISelDAGToDAG.cpp567 unsigned ShiftVal = 0; local
574 ShiftVal = CSD->getZExtValue();
575 if (ShiftVal > 4)
598 Shift = CurDAG->getTargetConstant(getArithExtendImm(Ext, ShiftVal), SDLoc(N),
799 unsigned ShiftVal = CSD->getZExtValue(); local
801 if (ShiftVal != 0 && ShiftVal != LegalShiftVal)
/external/llvm/lib/IR/
H A DAutoUpgrade.cpp525 unsigned ShiftVal = cast<llvm::ConstantInt>(Shift)->getZExtValue(); local
532 if (ShiftVal >= 32)
537 if (ShiftVal > 16) {
538 ShiftVal -= 16;
547 unsigned Idx = ShiftVal + i;
/external/llvm/lib/Target/AArch64/InstPrinter/
H A DAArch64InstPrinter.cpp1099 unsigned ShiftVal = AArch64_AM::getArithShiftValue(Val); local
1111 if (ShiftVal != 0)
1112 O << ", lsl #" << ShiftVal; local
1117 if (ShiftVal != 0)
1118 O << " #" << ShiftVal; local
/external/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelDAGToDAG.cpp1265 uint32_t ShiftVal = Shift->getZExtValue(); local
1272 Srl.getOperand(0), ShiftVal, WidthVal));
1287 uint32_t ShiftVal = Shift->getZExtValue(); local
1288 uint32_t MaskVal = Mask->getZExtValue() >> ShiftVal;
1294 And.getOperand(0), ShiftVal, WidthVal));
H A DAMDGPUISelLowering.cpp2698 SDValue ShiftVal = DAG.getConstant(OffsetVal, DL, MVT::i32); local
2700 BitsFrom, ShiftVal);
/external/capstone/arch/AArch64/
H A DAArch64InstPrinter.c810 unsigned ShiftVal = AArch64_AM_getArithShiftValue(Val); local
822 if (ShiftVal != 0) {
824 printInt32Bang(O, ShiftVal);
827 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.value = ShiftVal;
869 if (ShiftVal != 0) {
871 printInt32Bang(O, ShiftVal);
874 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].shift.value = ShiftVal;
/external/swiftshader/third_party/LLVM/lib/Transforms/Scalar/
H A DScalarReplAggregates.cpp2219 Value *ShiftVal = ConstantInt::get(EltVal->getType(), Shift); local
2220 EltVal = Builder.CreateLShr(EltVal, ShiftVal, "sroa.store.elt");
2265 Value *ShiftVal = ConstantInt::get(EltVal->getType(), Shift); local
2266 EltVal = Builder.CreateLShr(EltVal, ShiftVal, "sroa.store.elt");
2365 Value *ShiftVal = ConstantInt::get(SrcField->getType(), Shift); local
2366 SrcField = BinaryOperator::CreateShl(SrcField, ShiftVal, "", LI);
/external/llvm/lib/Target/X86/
H A DX86TargetTransformInfo.cpp1303 for (unsigned ShiftVal = 0; ShiftVal < BitSize; ShiftVal += 64) {
1304 APInt Tmp = ImmVal.ashr(ShiftVal).sextOrTrunc(64);
H A DX86ISelLowering.cpp5479 SDValue ShiftVal = DAG.getConstant(NumBits/8, dl, ScalarShiftTy); local
5480 return DAG.getBitcast(VT, DAG.getNode(Opc, dl, ShVT, SrcOp, ShiftVal));
[all...]
/external/llvm/lib/Transforms/InstCombine/
H A DInstCombineCasts.cpp447 ConstantInt *ShiftVal = nullptr; local
450 m_ConstantInt(ShiftVal)))) ||
457 unsigned ShiftAmount = ShiftVal ? ShiftVal->getZExtValue() : 0;
H A DInstCombineCalls.cpp390 APInt ShiftVal = COp->getValue();
391 if (ShiftVal.uge(BitWidth)) {
397 ShiftAmts.push_back((int)ShiftVal.getZExtValue());
/external/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp1859 // Store it in ShiftVal if so.
1860 static bool isSimpleShift(SDValue N, unsigned &ShiftVal) { argument
1869 ShiftVal = Amount;
2018 unsigned NewCCMask, ShiftVal; local
2021 isSimpleShift(NewC.Op0, ShiftVal) &&
2023 MaskVal >> ShiftVal,
2024 CmpVal >> ShiftVal,
2027 MaskVal >>= ShiftVal; local
2030 isSimpleShift(NewC.Op0, ShiftVal) &&
2032 MaskVal << ShiftVal,
2036 MaskVal <<= ShiftVal; local
[all...]
/external/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp1736 uint64_t ShiftVal = C->getZExtValue(); local
1752 emitInst(Opcode, ResultReg).addReg(Op0Reg).addImm(ShiftVal);
/external/llvm/lib/Analysis/
H A DValueTracking.cpp1766 auto ShiftVal = Shift->getLimitedValue(BitWidth - 1); local
1768 if (KnownOne.countLeadingZeros() < BitWidth - ShiftVal)
1771 if (KnownZero.countTrailingOnes() >= ShiftVal)
/external/clang/lib/CodeGen/
H A DCGBuiltin.cpp7020 unsigned ShiftVal = cast<llvm::ConstantInt>(Ops[2])->getZExtValue(); local
7027 if (ShiftVal >= 32)
7032 if (ShiftVal > 16) {
7033 ShiftVal -= 16;
7042 unsigned Idx = ShiftVal + i;

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