Searched refs:SpillSize (Results 1 - 8 of 8) sorted by relevance
| /external/swiftshader/third_party/LLVM/utils/TableGen/ |
| H A D | CodeGenRegisters.h | 111 unsigned SpillSize; member in class:llvm::CodeGenRegisterClass
193 unsigned SpillSize; member in struct:llvm::CodeGenRegisterClass::Key
198 SpillSize(O.SpillSize),
202 : Members(M), SpillSize(S), SpillAlignment(A) {}
206 SpillSize(RC.SpillSize),
209 // Lexicographical order of (Members, SpillSize, SpillAlignment).
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| H A D | CodeGenRegisters.cpp | 329 SpillSize = Size ? Size : EVT(VTs[0]).getSizeInBits();
344 SpillSize(Props.SpillSize),
381 OS << "{ S=" << K.SpillSize << ", A=" << K.SpillAlignment;
396 if (SpillSize != B.SpillSize)
397 return SpillSize < B.SpillSize;
413 A->SpillSize <= B->SpillSize
[all...] |
| H A D | RegisterInfoEmitter.cpp | 376 << RC.SpillSize/8 << ", "
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| /external/llvm/utils/TableGen/ |
| H A D | CodeGenRegisters.h | 303 unsigned SpillSize; member in class:llvm::CodeGenRegisterClass
407 unsigned SpillSize; member in struct:llvm::CodeGenRegisterClass::Key
411 : Members(M), SpillSize(S), SpillAlignment(A) {}
415 SpillSize(RC.SpillSize),
418 // Lexicographical order of (Members, SpillSize, SpillAlignment).
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| H A D | CodeGenRegisters.cpp | 708 SpillSize = Size ? Size : MVT(VTs[0]).getSizeInBits();
729 SpillSize(Props.SpillSize),
771 OS << "{ S=" << K.SpillSize << ", A=" << K.SpillAlignment;
783 return std::tie(*Members, SpillSize, SpillAlignment) <
784 std::tie(*B.Members, B.SpillSize, B.SpillAlignment);
799 A->SpillSize <= B->SpillSize &&
819 if (A->SpillSize < B->SpillSize)
[all...] |
| H A D | RegisterInfoEmitter.cpp | 1032 assert((RC.SpillSize/8) <= 0xffff && "SpillSize too large.");
1040 << RC.SpillSize/8 << ", "
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | StatepointLowering.cpp | 75 unsigned SpillSize = ValueType.getSizeInBits() / 8; local
76 assert((SpillSize * 8) == ValueType.getSizeInBits() && "Size not in bytes?");
93 if (MFI->getObjectSize(FI) == SpillSize) {
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| /external/llvm/lib/CodeGen/ |
| H A D | TargetInstrInfo.cpp | 471 unsigned SpillSize; local
477 TII.getStackSlotRange(RC, MO.getSubReg(), SpillSize, SpillOffset, MF);
481 MIB.addImm(SpillSize);
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