| /external/clang/test/CXX/except/except.spec/ |
| H A D | p14-ir.cpp | 55 struct X9 : X6, X7 { }; struct in inherits:X6,X7
63 // CHECK: define linkonce_odr void @_ZN2X9C1Ev(%struct.X9* %this) unnamed_addr
67 X9();
73 // CHECK: define linkonce_odr void @_ZN2X9C2Ev(%struct.X9* %this) unnamed_addr
|
| /external/clang/test/CodeGen/ |
| H A D | override-layout.c | 81 // CHECK: Type: struct X9
82 struct X9 { struct
137 struct X9 x9;
138 typedef int X9array[sizeof(struct X9)];
139 x9.y = sizeof(struct X9);
|
| /external/clang/test/SemaTemplate/ |
| H A D | temp_explicit.cpp | 141 template<typename T> struct X9 { }; // expected-note{{here}} struct
150 template struct X9<float>; // expected-warning{{must occur at global scope}}
|
| /external/libxaac/decoder/armv8/ |
| H A D | ixheaacd_overlap_add1.s | 26 stp X8, X9, [sp, #-16]!
39 ldp X8, X9, [sp], #16
87 LSL X9, X6, #1
160 ST1 {V18.H}[0], [X6], X9
162 ST1 {V18.H}[1], [X6], X9
164 ST1 {V18.H}[2], [X6], X9
166 ST1 {V18.H}[3], [X6], X9
220 ST1 {V18.H}[0], [X6], X9
222 ST1 {V18.H}[1], [X6], X9
224 ST1 {V18.H}[2], [X6], X9
[all...] |
| H A D | ixheaacd_shiftrountine_with_round.s | 2 stp X8, X9, [sp, #-16]!
21 ldp X8, X9, [sp], #16
|
| H A D | ixheaacd_shiftrountine_with_round_eld.s | 2 stp X8, X9, [sp, #-16]!
21 ldp X8, X9, [sp], #16
|
| H A D | ixheaacd_imdct_using_fft.s | 27 stp X8, X9, [sp, #-16]!
40 ldp X8, X9, [sp], #16
451 SUBS X9, X9, #1
623 MOv X9, X0
627 LD2 {v20.H, v21.H}[0], [X9], X2
628 LD2 {v22.H, v23.H}[0], [X9], X2
630 LD2 {v24.H, v25.H}[0], [X9]
637 ADD X9, X0, X2
639 LD2 {v20.H, v21.H}[2], [X9], X
[all...] |
| H A D | ixheaacd_sbr_imdct_using_fft.s | 27 stp X8, X9, [sp, #-16]!
40 ldp X8, X9, [sp], #16
402 SUBS X9, X9, #1
595 MOV X9, X0
600 LD2 {V20.H, V21.H}[0], [X9], X2
601 LD2 {V22.H, V23.H}[0], [X9], X2
603 LD2 {V24.H, V25.H}[0], [X9]
610 ADD X9, X0, X2
612 LD2 {V20.H, V21.H}[2], [X9], X
[all...] |
| H A D | ixheaacd_overlap_add2.s | 27 stp X8, X9, [sp, #-16]!
40 ldp X8, X9, [sp], #16
54 LSL X9, X5, #2
56 ADD X10, X0, X9
75 MOV X9, X2
166 ADD X7, X7, X9
|
| H A D | ixheaacd_apply_scale_factors.s | 3 stp X8, X9, [sp, #-16]!
20 ldp X8, X9, [sp], #16
|
| H A D | ixheaacd_no_lap1.s | 27 stp X8, X9, [sp, #-16]!
40 ldp X8, X9, [sp], #16
|
| H A D | ixheaacd_postradixcompute4.s | 14 ldp X8, X9, [sp], #16
|
| H A D | ixheaacd_cos_sin_mod_loop2.s | 6 stp X8, X9, [sp, #-16]!
24 ldp X8, X9, [sp], #16
|
| H A D | ixheaacd_cos_sin_mod_loop1.s | 6 stp X8, X9, [sp, #-16]!
24 ldp X8, X9, [sp], #16
|
| H A D | ixheaacd_sbr_qmf_analysis32_neon.s | 6 stp X8, X9, [sp, #-16]!
19 ldp X8, X9, [sp], #16
|
| H A D | ixheaacd_fft32x32_ld2_armv8.s | 2 stp X8, X9, [sp, #-16]!
22 ldp X8, X9, [sp], #16
|
| H A D | ixheaacd_pre_twiddle.s | 27 stp X8, X9, [sp, #-16]!
40 ldp X8, X9, [sp], #16
|
| /external/boringssl/src/crypto/fipsmodule/md4/ |
| H A D | md4.c | 139 uint32_t X0, X1, X2, X3, X4, X5, X6, X7, X8, X9, X10, X11, X12, X13, X14, X15; local
175 X9 = l;
179 R0(D, A, B, C, X9, 7, 0);
203 R1(C, D, A, B, X9, 9, 0x5A827999L);
223 R2(D, A, B, C, X9, 9, 0x6ED9EBA1L);
|
| /external/clang/test/Index/ |
| H A D | annotate-nested-name-specifier.cpp | 133 struct X9 : X8 { struct in inherits:X8
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCBaseInfo.h | 40 case R9 : case X9 : case F9 : case V9 : case CR2GT: return 9;
|
| /external/clang/test/SemaCXX/ |
| H A D | new-delete.cpp | 200 class X9 { class
206 void f(X9 *x9) {
207 delete x9; // expected-error {{no suitable member 'operator delete' in 'X9'}}
|
| /external/llvm/lib/LibDriver/ |
| H A D | LibDriver.cpp | 43 #define OPTION(X1, X2, ID, KIND, GROUP, ALIAS, X6, X7, X8, X9, X10) \
45 X1, X2, X9, X10, OPT_##ID, llvm::opt::Option::KIND##Class, X8, X7, \
|
| /external/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.h | 41 case AArch64::X9: return AArch64::W9;
81 case AArch64::W9: return AArch64::X9;
|
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64FrameLowering.cpp | 244 // If MBB is an entry block, use X9 as the scratch register
246 return AArch64::X9;
259 // Prefer X9 since it was historically used for the prologue scratch reg.
261 if (LiveRegs.available(MRI, AArch64::X9))
262 return AArch64::X9;
521 // SUB X9, SP, NumBytes
522 // -- X9 is temporary register, so shouldn't contain any live data here,
524 // AND SP, X9, 0b11111...0000
|
| /external/libavc/encoder/ |
| H A D | ive2.h | 137 IVE_CMD_CTL_SET_ME_PARAMS = 0X9,
|