/external/compiler-rt/test/builtins/Unit/arm/ |
H A D | call_apsr.S | 21 // return apsr; 28 mrs r0, apsr 35 // return apsr; 41 mrs r0, apsr
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/external/capstone/suite/MC/ARM/ |
H A D | thumb2-mclass.s.cs | 2 0xef,0xf3,0x00,0x80 = mrs r0, apsr 16 0x80,0xf3,0x00,0x88 = msr apsr, r0 17 0x80,0xf3,0x00,0x88 = msr apsr, r0
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
H A D | thumb2-mclass.s | 12 mrs r0, apsr
27 @ CHECK: mrs r0, apsr @ encoding: [0xef,0xf3,0x00,0x80]
46 msr apsr, r0
61 @ CHECK: msr apsr, r0 @ encoding: [0x80,0xf3,0x00,0x80]
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/external/llvm/test/MC/ARM/ |
H A D | thumb2-mclass.s | 13 mrs r0, apsr 25 @ CHECK: mrs r0, apsr @ encoding: [0xef,0xf3,0x00,0x80] 41 msr apsr, r0 57 @ CHECK-V6M: msr apsr, r0 @ encoding: [0x80,0xf3,0x00,0x88] 58 @ CHECK-V6M: msr apsr, r0 @ encoding: [0x80,0xf3,0x00,0x88]
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/external/vixl/test/aarch32/ |
H A D | test-simulator-cond-rd-operand-const-a32.cc | 145 uint32_t apsr; member in struct:vixl::aarch32::__anon30044::Inputs 521 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 535 __ Str(nzcv_bits, MemOperand(result_ptr, offsetof(Inputs, apsr))); 559 printf("0x%08" PRIx32, results[i]->outputs[j].apsr); 582 uint32_t apsr = results[i]->outputs[j].apsr; local 584 uint32_t apsr_input = kTests[i].inputs[j].apsr; 586 uint32_t apsr_ref = reference[i].outputs[j].apsr; 589 if (((apsr != apsr_ref) || (rd != rd_ref)) && 610 printf("0x%08" PRIx32, apsr); [all...] |
H A D | test-simulator-cond-rd-operand-const-t32.cc | 145 uint32_t apsr; member in struct:vixl::aarch32::__anon30045::Inputs 636 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 650 __ Str(nzcv_bits, MemOperand(result_ptr, offsetof(Inputs, apsr))); 674 printf("0x%08" PRIx32, results[i]->outputs[j].apsr); 697 uint32_t apsr = results[i]->outputs[j].apsr; local 699 uint32_t apsr_input = kTests[i].inputs[j].apsr; 701 uint32_t apsr_ref = reference[i].outputs[j].apsr; 704 if (((apsr != apsr_ref) || (rd != rd_ref)) && 725 printf("0x%08" PRIx32, apsr); [all...] |
H A D | test-simulator-cond-rd-operand-imm16-t32.cc | 139 uint32_t apsr; member in struct:vixl::aarch32::__anon30046::Inputs 474 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 488 __ Str(nzcv_bits, MemOperand(result_ptr, offsetof(Inputs, apsr))); 512 printf("0x%08" PRIx32, results[i]->outputs[j].apsr); 535 uint32_t apsr = results[i]->outputs[j].apsr; local 537 uint32_t apsr_input = kTests[i].inputs[j].apsr; 539 uint32_t apsr_ref = reference[i].outputs[j].apsr; 542 if (((apsr != apsr_ref) || (rd != rd_ref)) && 563 printf("0x%08" PRIx32, apsr); [all...] |
H A D | test-simulator-cond-rd-operand-rn-a32.cc | 151 uint32_t apsr; member in struct:vixl::aarch32::__anon30047::Inputs 558 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 573 __ Str(nzcv_bits, MemOperand(result_ptr, offsetof(Inputs, apsr))); 598 printf("0x%08" PRIx32, results[i]->outputs[j].apsr); 623 uint32_t apsr = results[i]->outputs[j].apsr; local 626 uint32_t apsr_input = kTests[i].inputs[j].apsr; 629 uint32_t apsr_ref = reference[i].outputs[j].apsr; 633 if (((apsr != apsr_ref) || (rd != rd_ref) || (rn != rn_ref)) && 658 printf("0x%08" PRIx32, apsr); [all...] |
H A D | test-simulator-cond-rd-operand-rn-ror-amount-a32.cc | 145 uint32_t apsr; member in struct:vixl::aarch32::__anon30048::Inputs 623 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 638 __ Str(nzcv_bits, MemOperand(result_ptr, offsetof(Inputs, apsr))); 663 printf("0x%08" PRIx32, results[i]->outputs[j].apsr); 688 uint32_t apsr = results[i]->outputs[j].apsr; local 691 uint32_t apsr_input = kTests[i].inputs[j].apsr; 694 uint32_t apsr_ref = reference[i].outputs[j].apsr; 698 if (((apsr != apsr_ref) || (rd != rd_ref) || (rn != rn_ref)) && 723 printf("0x%08" PRIx32, apsr); [all...] |
H A D | test-simulator-cond-rd-operand-rn-ror-amount-t32.cc | 145 uint32_t apsr; member in struct:vixl::aarch32::__anon30049::Inputs 623 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 638 __ Str(nzcv_bits, MemOperand(result_ptr, offsetof(Inputs, apsr))); 663 printf("0x%08" PRIx32, results[i]->outputs[j].apsr); 688 uint32_t apsr = results[i]->outputs[j].apsr; local 691 uint32_t apsr_input = kTests[i].inputs[j].apsr; 694 uint32_t apsr_ref = reference[i].outputs[j].apsr; 698 if (((apsr != apsr_ref) || (rd != rd_ref) || (rn != rn_ref)) && 723 printf("0x%08" PRIx32, apsr); [all...] |
H A D | test-simulator-cond-rd-operand-rn-t32.cc | 151 uint32_t apsr; member in struct:vixl::aarch32::__anon30056::Inputs 558 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 573 __ Str(nzcv_bits, MemOperand(result_ptr, offsetof(Inputs, apsr))); 598 printf("0x%08" PRIx32, results[i]->outputs[j].apsr); 623 uint32_t apsr = results[i]->outputs[j].apsr; local 626 uint32_t apsr_input = kTests[i].inputs[j].apsr; 629 uint32_t apsr_ref = reference[i].outputs[j].apsr; 633 if (((apsr != apsr_ref) || (rd != rd_ref) || (rn != rn_ref)) && 658 printf("0x%08" PRIx32, apsr); [all...] |
H A D | test-simulator-cond-rd-operand-rn-shift-amount-1to31-a32.cc | 147 uint32_t apsr; member in struct:vixl::aarch32::__anon30050::Inputs 917 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 932 __ Str(nzcv_bits, MemOperand(result_ptr, offsetof(Inputs, apsr))); 957 printf("0x%08" PRIx32, results[i]->outputs[j].apsr); 982 uint32_t apsr = results[i]->outputs[j].apsr; local 985 uint32_t apsr_input = kTests[i].inputs[j].apsr; 988 uint32_t apsr_ref = reference[i].outputs[j].apsr; 992 if (((apsr != apsr_ref) || (rd != rd_ref) || (rn != rn_ref)) && 1017 printf("0x%08" PRIx32, apsr); [all...] |
H A D | test-simulator-cond-rd-operand-rn-shift-amount-1to31-t32.cc | 147 uint32_t apsr; member in struct:vixl::aarch32::__anon30051::Inputs 917 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 932 __ Str(nzcv_bits, MemOperand(result_ptr, offsetof(Inputs, apsr))); 957 printf("0x%08" PRIx32, results[i]->outputs[j].apsr); 982 uint32_t apsr = results[i]->outputs[j].apsr; local 985 uint32_t apsr_input = kTests[i].inputs[j].apsr; 988 uint32_t apsr_ref = reference[i].outputs[j].apsr; 992 if (((apsr != apsr_ref) || (rd != rd_ref) || (rn != rn_ref)) && 1017 printf("0x%08" PRIx32, apsr); [all...] |
H A D | test-simulator-cond-rd-operand-rn-shift-amount-1to32-a32.cc | 147 uint32_t apsr; member in struct:vixl::aarch32::__anon30052::Inputs 927 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 942 __ Str(nzcv_bits, MemOperand(result_ptr, offsetof(Inputs, apsr))); 967 printf("0x%08" PRIx32, results[i]->outputs[j].apsr); 992 uint32_t apsr = results[i]->outputs[j].apsr; local 995 uint32_t apsr_input = kTests[i].inputs[j].apsr; 998 uint32_t apsr_ref = reference[i].outputs[j].apsr; 1002 if (((apsr != apsr_ref) || (rd != rd_ref) || (rn != rn_ref)) && 1027 printf("0x%08" PRIx32, apsr); [all...] |
H A D | test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc | 147 uint32_t apsr; member in struct:vixl::aarch32::__anon30053::Inputs 927 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 942 __ Str(nzcv_bits, MemOperand(result_ptr, offsetof(Inputs, apsr))); 967 printf("0x%08" PRIx32, results[i]->outputs[j].apsr); 992 uint32_t apsr = results[i]->outputs[j].apsr; local 995 uint32_t apsr_input = kTests[i].inputs[j].apsr; 998 uint32_t apsr_ref = reference[i].outputs[j].apsr; 1002 if (((apsr != apsr_ref) || (rd != rd_ref) || (rn != rn_ref)) && 1027 printf("0x%08" PRIx32, apsr); [all...] |
H A D | test-simulator-cond-rd-rn-rm-ge-a32.cc | 150 uint32_t apsr; member in struct:vixl::aarch32::__anon30071::Inputs 475 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 509 __ Str(nzcv_bits, MemOperand(result_ptr, offsetof(Inputs, apsr))); 551 printf("0x%08" PRIx32, results[i]->outputs[j].apsr); 582 uint32_t apsr = results[i]->outputs[j].apsr; local 588 uint32_t apsr_input = kTests[i].inputs[j].apsr; 594 uint32_t apsr_ref = reference[i].outputs[j].apsr; 601 if (((apsr != apsr_ref) || (qbit != qbit_ref) || (ge != ge_ref) || 639 printf("0x%08" PRIx32, apsr); [all...] |
H A D | test-simulator-cond-rd-rn-rm-ge-t32.cc | 150 uint32_t apsr; member in struct:vixl::aarch32::__anon30072::Inputs 475 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 509 __ Str(nzcv_bits, MemOperand(result_ptr, offsetof(Inputs, apsr))); 551 printf("0x%08" PRIx32, results[i]->outputs[j].apsr); 582 uint32_t apsr = results[i]->outputs[j].apsr; local 588 uint32_t apsr_input = kTests[i].inputs[j].apsr; 594 uint32_t apsr_ref = reference[i].outputs[j].apsr; 601 if (((apsr != apsr_ref) || (qbit != qbit_ref) || (ge != ge_ref) || 639 printf("0x%08" PRIx32, apsr); [all...] |
H A D | test-simulator-cond-rd-rn-rm-q-a32.cc | 142 uint32_t apsr; member in struct:vixl::aarch32::__anon30073::Inputs 459 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 493 __ Str(nzcv_bits, MemOperand(result_ptr, offsetof(Inputs, apsr))); 535 printf("0x%08" PRIx32, results[i]->outputs[j].apsr); 566 uint32_t apsr = results[i]->outputs[j].apsr; local 572 uint32_t apsr_input = kTests[i].inputs[j].apsr; 578 uint32_t apsr_ref = reference[i].outputs[j].apsr; 585 if (((apsr != apsr_ref) || (qbit != qbit_ref) || (ge != ge_ref) || 623 printf("0x%08" PRIx32, apsr); [all...] |
H A D | test-simulator-cond-rd-rn-rm-q-t32.cc | 142 uint32_t apsr; member in struct:vixl::aarch32::__anon30074::Inputs 459 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 493 __ Str(nzcv_bits, MemOperand(result_ptr, offsetof(Inputs, apsr))); 535 printf("0x%08" PRIx32, results[i]->outputs[j].apsr); 566 uint32_t apsr = results[i]->outputs[j].apsr; local 572 uint32_t apsr_input = kTests[i].inputs[j].apsr; 578 uint32_t apsr_ref = reference[i].outputs[j].apsr; 585 if (((apsr != apsr_ref) || (qbit != qbit_ref) || (ge != ge_ref) || 623 printf("0x%08" PRIx32, apsr); [all...] |
H A D | test-simulator-cond-rd-rn-rm-sel-a32.cc | 138 uint32_t apsr; member in struct:vixl::aarch32::__anon30075::Inputs 452 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 486 __ Str(nzcv_bits, MemOperand(result_ptr, offsetof(Inputs, apsr))); 528 printf("0x%08" PRIx32, results[i]->outputs[j].apsr); 559 uint32_t apsr = results[i]->outputs[j].apsr; local 565 uint32_t apsr_input = kTests[i].inputs[j].apsr; 571 uint32_t apsr_ref = reference[i].outputs[j].apsr; 578 if (((apsr != apsr_ref) || (qbit != qbit_ref) || (ge != ge_ref) || 616 printf("0x%08" PRIx32, apsr); [all...] |
H A D | test-simulator-cond-rd-rn-rm-sel-t32.cc | 138 uint32_t apsr; member in struct:vixl::aarch32::__anon30076::Inputs 452 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 486 __ Str(nzcv_bits, MemOperand(result_ptr, offsetof(Inputs, apsr))); 528 printf("0x%08" PRIx32, results[i]->outputs[j].apsr); 559 uint32_t apsr = results[i]->outputs[j].apsr; local 565 uint32_t apsr_input = kTests[i].inputs[j].apsr; 571 uint32_t apsr_ref = reference[i].outputs[j].apsr; 578 if (((apsr != apsr_ref) || (qbit != qbit_ref) || (ge != ge_ref) || 616 printf("0x%08" PRIx32, apsr); [all...] |
H A D | test-simulator-cond-rdlow-operand-imm8-t32.cc | 140 uint32_t apsr; member in struct:vixl::aarch32::__anon30079::Inputs 1626 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 1640 __ Str(nzcv_bits, MemOperand(result_ptr, offsetof(Inputs, apsr))); 1664 printf("0x%08" PRIx32, results[i]->outputs[j].apsr); 1687 uint32_t apsr = results[i]->outputs[j].apsr; local 1689 uint32_t apsr_input = kTests[i].inputs[j].apsr; 1691 uint32_t apsr_ref = reference[i].outputs[j].apsr; 1694 if (((apsr != apsr_ref) || (rd != rd_ref)) && 1715 printf("0x%08" PRIx32, apsr); [all...] |
H A D | test-simulator-cond-rd-rn-operand-rm-a32.cc | 172 uint32_t apsr; member in struct:vixl::aarch32::__anon30061::Inputs 1157 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 1173 __ Str(nzcv_bits, MemOperand(result_ptr, offsetof(Inputs, apsr))); 1199 printf("0x%08" PRIx32, results[i]->outputs[j].apsr); 1226 uint32_t apsr = results[i]->outputs[j].apsr; local 1230 uint32_t apsr_input = kTests[i].inputs[j].apsr; 1234 uint32_t apsr_ref = reference[i].outputs[j].apsr; 1239 if (((apsr != apsr_ref) || (rd != rd_ref) || (rn != rn_ref) || 1269 printf("0x%08" PRIx32, apsr); [all...] |
H A D | test-simulator-cond-rd-rn-operand-rm-t32.cc | 172 uint32_t apsr; member in struct:vixl::aarch32::__anon30069::Inputs 1157 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 1173 __ Str(nzcv_bits, MemOperand(result_ptr, offsetof(Inputs, apsr))); 1199 printf("0x%08" PRIx32, results[i]->outputs[j].apsr); 1226 uint32_t apsr = results[i]->outputs[j].apsr; local 1230 uint32_t apsr_input = kTests[i].inputs[j].apsr; 1234 uint32_t apsr_ref = reference[i].outputs[j].apsr; 1239 if (((apsr != apsr_ref) || (rd != rd_ref) || (rn != rn_ref) || 1269 printf("0x%08" PRIx32, apsr); [all...] |
H A D | test-simulator-cond-rdlow-rnlow-rmlow-t32.cc | 140 uint32_t apsr; member in struct:vixl::aarch32::__anon30081::Inputs 940 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 956 __ Str(nzcv_bits, MemOperand(result_ptr, offsetof(Inputs, apsr))); 982 printf("0x%08" PRIx32, results[i]->outputs[j].apsr); 1009 uint32_t apsr = results[i]->outputs[j].apsr; local 1013 uint32_t apsr_input = kTests[i].inputs[j].apsr; 1017 uint32_t apsr_ref = reference[i].outputs[j].apsr; 1022 if (((apsr != apsr_ref) || (rd != rd_ref) || (rn != rn_ref) || 1052 printf("0x%08" PRIx32, apsr); [all...] |