| /external/llvm/test/MC/Mips/ |
| H A D | set-mips-directives.s | 31 drotr32 $1,$14,15
34 drotr32 $1,$14,15
37 drotr32 $1,$14,15
67 # CHECK: drotr32 $1, $14, 15
70 # CHECK: drotr32 $1, $14, 15
73 # CHECK: drotr32 $1, $14, 15
|
| H A D | set-arch.s | 30 drotr32 $1, $14, 15
33 drotr32 $1, $14, 15
36 drotr32 $1, $14, 15
63 # CHECK: drotr32 $1, $14, 15
|
| H A D | rotations64.s | 108 # CHECK-64R: drotr32 $4, $4, 31 # encoding: [0x00,0x24,0x27,0xfe]
116 # CHECK-64R: drotr32 $4, $5, 31 # encoding: [0x00,0x25,0x27,0xfe]
121 # CHECK-64R: drotr32 $4, $5, 1 # encoding: [0x00,0x25,0x20,0x7e]
126 # CHECK-64R: drotr32 $4, $5, 0 # encoding: [0x00,0x25,0x20,0x3e]
144 # CHECK-64R: drotr32 $4, $5, 31 # encoding: [0x00,0x25,0x27,0xfe]
149 # CHECK-64R: drotr32 $4, $5, 1 # encoding: [0x00,0x25,0x20,0x7e]
154 # CHECK-64R: drotr32 $4, $5, 0 # encoding: [0x00,0x25,0x20,0x3e]
200 # CHECK-64R: drotr32 $4, $5, 0 # encoding: [0x00,0x25,0x20,0x3e]
205 # CHECK-64R: drotr32 $4, $5, 1 # encoding: [0x00,0x25,0x20,0x7e]
210 # CHECK-64R: drotr32
[all...] |
| H A D | set-mips-directives-bad.s | 33 drotr32 $1,$14,15 # CHECK: error: instruction requires a CPU feature not currently enabled
|
| H A D | mips64-alu-instructions.s | 77 # CHECK: drotr32 $9, $6, 20 # encoding: [0x3e,0x4d,0x26,0x00]
102 drotr32 $9, $6, 20
|
| /external/llvm/test/MC/Mips/mips5/ |
| H A D | invalid-mips64r2.s | 16 drotr32 $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 drotr32 $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips64/ |
| H A D | invalid-mips64r2.s | 17 drotr32 $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
18 drotr32 $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/capstone/suite/MC/Mips/ |
| H A D | mips64-alu-instructions.s.cs | 39 0x3e,0x4d,0x26,0x00 = drotr32 $9, $6, 52
|
| /external/llvm/test/MC/Mips/mips64r2/ |
| H A D | valid.s | 98 drotr32 $1,15 # CHECK: drotr32 $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xfe]
99 drotr32 $1,$14,15 # CHECK: drotr32 $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xfe]
|
| /external/llvm/test/MC/Mips/mips64r3/ |
| H A D | valid.s | 98 drotr32 $1,15 # CHECK: drotr32 $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xfe]
99 drotr32 $1,$14,15 # CHECK: drotr32 $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xfe]
|
| /external/llvm/test/MC/Mips/mips64r5/ |
| H A D | valid.s | 98 drotr32 $1,15 # CHECK: drotr32 $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xfe]
99 drotr32 $1,$14,15 # CHECK: drotr32 $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xfe]
|
| /external/llvm/test/MC/Mips/micromips64r6/ |
| H A D | invalid.s | 292 drotr32 $1, $2, 32 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected 5-bit unsigned immediate
293 drotr32 $1, $2, -1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected 5-bit unsigned immediate
|
| H A D | valid.s | 301 drotr32 $1, $2, 4 # CHECK: drotr32 $1, $2, 4 # encoding: [0x58,0x22,0x20,0xc8]
|
| /external/v8/src/mips64/ |
| H A D | disasm-mips64.cc | 1201 Format(instr, "drotr32 'rd, 'rt, 'sa");
|
| H A D | assembler-mips64.h | 797 void drotr32(Register rd, Register rt, uint16_t sa);
|
| H A D | assembler-mips64.cc | 1882 void Assembler::drotr32(Register rd, Register rt, uint16_t sa) { function in class:v8::internal::Assembler
|
| H A D | macro-assembler-mips64.cc | 1140 drotr32(rd, rs, dror_value - 32);
|