| /external/v8/src/arm64/ |
| H A D | assembler-arm64-inl.h | 1109 Instr Assembler::ImmLSUnsigned(int imm12) { argument
1110 DCHECK(is_uint12(imm12));
1111 return imm12 << ImmLSUnsigned_offset;
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| H A D | assembler-arm64.h | 1786 inline static Instr ImmLSUnsigned(int imm12);
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| /external/valgrind/VEX/priv/ |
| H A D | host_arm64_defs.h | 164 UShort imm12; /* 0 .. 4095 */ member in struct:__anon28178::__anon28179::__anon28180
174 extern ARM64RIA* ARM64RIA_I12 ( UShort imm12, UChar shift );
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| H A D | guest_arm_toIR.c | 2396 IRExpr* mk_EA_reg_plusminus_imm12 ( UInt rN, UInt bU, UInt imm12, argument
2401 vassert(imm12 < 0x1000);
2403 DIS(buf, "[r%u, #%c%u]", rN, opChar, imm12);
2407 mkU32(imm12) );
15940 UInt imm12 = INSN(11,0); local
15943 DIP("pld%c [r%u, #%c%u]\n", bR ? ' ' : 'w', rN, bU ? '+' : '-', imm12);
15975 UInt imm12 = INSN(11,0); local
15977 DIP("pli [r%u, #%c%u]\n", rN, bU ? '+' : '-', imm12);
16529 A5-20 1 | 16 cond 0101 UB0L Rn Rd imm12
16531 A5-24 2 | 16 cond 0101 UB1L Rn Rd imm12
16579 UInt imm12 = (insn >> 0) & 0xFFF; /* 11:0 */ local
18258 UInt imm12 = INSN(11,0); local
18313 UInt imm12 = INSN(11,0); local
18536 UInt imm12 = INSN(11,0); local
18639 UInt imm12 = INSN(11,0); local
20903 UInt imm12 = (INSN0(10,10) << 11) | (INSN1(14,12) << 8) | INSN1(7,0); local
21018 UInt imm12 = (INSN0(10,10) << 11) | (INSN1(14,12) << 8) | INSN1(7,0); local
21946 UInt imm12 = INSN1(11,0); local
23078 UInt imm12 = INSN1(11,0); local
23357 UInt imm12 = INSN1(11,0); local
23385 UInt imm12 = INSN1(11,0); local
[all...] |
| H A D | host_arm64_defs.c | 305 ARM64RIA* ARM64RIA_I12 ( UShort imm12, UChar shift ) { argument
308 riA->ARM64riA.I12.imm12 = imm12;
310 vassert(imm12 < 4096);
324 vex_printf("#%u",(UInt)(riA->ARM64riA.I12.imm12
3098 /* STRB Wd, [Xn|SP + uimm12 * 1]: 00 111 001 00 imm12 n d
3099 LDRB Wd, [Xn|SP + uimm12 * 1]: 00 111 001 01 imm12 n d
3147 /* STRH Wd, [Xn|SP + uimm12 * 2]: 01 111 001 00 imm12 n d
3148 LDRH Wd, [Xn|SP + uimm12 * 2]: 01 111 001 01 imm12 n d
3196 /* STR Wd, [Xn|SP + uimm12 * 4]: 10 111 001 00 imm12
[all...] |
| H A D | guest_arm64_toIR.c | 2408 /* ------------------ ADD/SUB{,S} imm12 ------------------ */
4720 11 111 00100 imm12 nn tt STR Xt, [Xn|SP, #imm12 * 8]
4721 11 111 00101 imm12 nn tt LDR Xt, [Xn|SP, #imm12 * 8]
4723 10 111 00100 imm12 nn tt STR Wt, [Xn|SP, #imm12 * 4]
4724 10 111 00101 imm12 nn tt LDR Wt, [Xn|SP, #imm12 * 4]
4726 01 111 00100 imm12 n
5181 UInt imm12 = INSN(21,10); local
6658 UInt imm12 = INSN(21,10); local
[all...] |
| H A D | host_arm64_isel.c | 923 vassert(ri->ARM64riA.I12.imm12 < 4096);
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| /external/swiftshader/third_party/subzero/src/ |
| H A D | IceAssemblerARM32.h | 721 // s=SetFlags, oooo=Opcode, nnnn=Rn, dddd=Rd, iiiiiiiiiiii=imm12 (See ARM
724 bool SetFlags, IValueT Rn, IValueT Rd, IValueT imm12,
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| /external/vixl/src/aarch64/ |
| H A D | assembler-aarch64.h | 2775 static Instr ImmLSUnsigned(int64_t imm12) { argument
2776 VIXL_ASSERT(IsUint12(imm12));
2777 return TruncateToUint12(imm12) << ImmLSUnsigned_offset;
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| /external/valgrind/none/tests/arm64/ |
| H A D | integer.stdout.exp | 194 ADD imm12
235 SUB imm12
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| /external/valgrind/none/tests/arm/ |
| H A D | v6intARM.stdout.exp | 779 pld reg +/- imm12 cases
|