/external/llvm/include/llvm/CodeGen/ |
H A D | ValueTypes.h | 96 if (isVector()) 132 /// isVector - Return true if this is a vector value type. 133 bool isVector() const { function in struct:llvm::EVT 134 return isSimple() ? V.isVector() : isExtendedVector(); 234 return isVector() ? getVectorElementType() : *this; 240 assert(isVector() && "Invalid vector type!"); 249 assert(isVector() && "Invalid vector type!"); 282 assert(isInteger() && !isVector() && "Invalid integer type!"); 294 assert(isInteger() && !isVector() && "Invalid integer type!");
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/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
H A D | ValueTypes.h | 157 /// isVector - Return true if this is a vector value type. 158 bool isVector() const { function in class:llvm::MVT 183 return isVector() ? getVectorElementType() : *this; 478 /// isVector - Return true if this is a vector value type. 479 bool isVector() const { function in struct:llvm::EVT 480 return isSimple() ? V.isVector() : isExtendedVector(); 570 return isVector() ? getVectorElementType() : *this; 576 assert(isVector() && "Invalid vector type!"); 585 assert(isVector() && "Invalid vector type!"); 614 assert(isInteger() && !isVector() [all...] |
/external/llvm/utils/TableGen/ |
H A D | DAGISelEmitter.cpp | 88 if (LHSVT.isVector() != RHSVT.isVector()) 89 return RHSVT.isVector();
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H A D | DAGISelMatcher.cpp | 317 return !MVT(T2).isInteger() || MVT(T2).isVector(); 320 return !MVT(T1).isInteger() || MVT(T1).isVector();
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/external/swiftshader/third_party/LLVM/utils/TableGen/ |
H A D | DAGISelEmitter.cpp | 75 if (MVT(V1).isVector() != MVT(V2).isVector()) 76 return MVT(V2).isVector();
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H A D | DAGISelMatcher.cpp | 347 return !MVT(T2).isInteger() || MVT(T2).isVector(); 350 return !MVT(T1).isInteger() || MVT(T1).isVector();
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMTargetStreamer.cpp | 57 bool isVector) {} 56 emitRegSave(const SmallVectorImpl<unsigned> &RegList, bool isVector) argument
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H A D | ARMELFStreamer.cpp | 74 bool isVector) override; 138 bool isVector) { 140 if (isVector) 370 bool isVector) override; 438 void emitRegSave(const SmallVectorImpl<unsigned> &RegList, bool isVector); 650 bool isVector) { 651 getStreamer().emitRegSave(RegList, isVector);
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/external/swiftshader/src/OpenGL/compiler/ |
H A D | Intermediate.cpp | 343 if (left->isMatrix() || left->isArray() || left->isVector() || left->getBasicType() == EbtStruct) { 350 if (left->getBasicType() != EbtBool || left->isMatrix() || left->isArray() || left->isVector()) { 490 if (child->getType().getBasicType() != EbtBool || child->getType().isMatrix() || child->getType().isArray() || child->getType().isVector()) { 1018 if (left->isVector()) 1030 if (right->isVector()) { 1042 if (left->isVector() && right->isVector()) { 1044 } else if (left->isVector() || right->isVector()) { 1061 if (left->isVector()) [all...] |
H A D | Types.h | 446 bool isVector() const { return primarySize > 1 && !isMatrix(); } function in class:TType 645 bool isVector() const function in struct:TPublicType 669 return array || isMatrix() || isVector();
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/external/clang/utils/ABITest/ |
H A D | TypeGen.py | 117 def __init__(self, index, isVector, elementType, size): 118 if isVector: 124 self.isVector = isVector 127 if isVector: 135 if self.isVector: 144 if self.isVector:
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/external/parameter-framework/upstream/parameter/ |
H A D | ElementHandle.cpp | 155 struct isVector : std::false_type struct in inherits:std::false_type 159 struct isVector<std::vector<T>> : std::true_type struct in inherits:std::true_type 226 if (not checkGetValidity(isVector<T>::value, error)) {
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/external/clang/include/clang/AST/ |
H A D | APValue.h | 187 bool isVector() const { return Kind == Vector; } function in class:clang::APValue 259 assert(isVector() && "Invalid accessor"); 267 assert(isVector() && "Invalid accessor"); 356 assert(isVector() && "Invalid accessor");
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/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZCallingConv.h | 37 return ArgVT.isVector() && ArgVT.getStoreSize() <= 8;
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeVectorOps.cpp | 144 HasVectors |= J->isVector(); 205 if (LD->getMemoryVT().isVector() && ExtType != ISD::NON_EXTLOAD) 234 if (StVT.isVector() && ST->isTruncatingStore()) 254 HasVectorValue |= J->isVector(); 410 if (Op.getOperand(j).getValueType().isVector()) 415 NVT.isVector() && NVT.getVectorElementType().isFloatingPoint()) 425 (VT.isVector() && VT.getVectorElementType().isFloatingPoint() && 426 NVT.isVector() && NVT.getVectorElementType().isFloatingPoint())) 455 if (Op.getOperand(j).getValueType().isVector()) 720 assert(VT.isVector() [all...] |
H A D | LegalizeVectorTypes.cpp | 352 assert(N->getValueType(0).isVector() == 353 N->getOperand(0).getValueType().isVector() && 356 if (N->getValueType(0).isVector()) return ScalarizeVecRes_VSETCC(N); 380 assert(N->getValueType(0).isVector() && 381 N->getOperand(0).getValueType().isVector() && 1215 assert(N->getValueType(0).isVector() && 1216 N->getOperand(0).getValueType().isVector() && 1536 assert(Mask.getValueType().isVector() && "VSELECT without a vector mask?"); 1991 assert(N->getValueType(0).isVector() && 1992 N->getOperand(0).getValueType().isVector() [all...] |
H A D | SelectionDAG.cpp | 681 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 694 assert(N->getValueType(0).isVector() && "Wrong return type!"); 1029 assert(!VT.isVector() && 1042 assert(VT.isVector() && "This DAG node is restricted to vector types."); 1053 assert(VT.isVector() && "This DAG node is restricted to vector types."); 1064 assert(VT.isVector() && "This DAG node is restricted to vector types."); 1123 if (VT.isVector() && TLI->getTypeAction(*getContext(), EltVT) == 1135 else if (NewNodesMustHaveLegalTypes && VT.isVector() && 1187 if (!VT.isVector()) 1197 if (VT.isVector()) [all...] |
H A D | DAGCombiner.cpp | 494 if (LHSTy.isVector()) 1032 if (VT.isVector() || !VT.isInteger()) 1090 if (VT.isVector() || !VT.isInteger()) 1134 if (VT.isVector() || !VT.isInteger()) 1166 if (VT.isVector() || !VT.isInteger()) 1639 if (VT.isVector()) { 1722 if (!VT.isVector() && SimplifyDemandedBits(SDValue(N, 0))) 1727 VT.isInteger() && !VT.isVector() && DAG.haveNoCommonBitsSet(N0, N1)) 1845 if (!VT.isVector()) 1858 if (VT.isVector()) { [all...] |
/external/llvm/lib/Target/AMDGPU/ |
H A D | R600EmitClauseMarkers.cpp | 59 if (TII->isVector(MI) || TII->isCubeOp(MI.getOpcode()) || 77 if (TII->isVector(MI) || TII->isCubeOp(MI.getOpcode()))
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H A D | AMDGPUTargetTransformInfo.cpp | 127 unsigned NElts = LT.second.isVector() ?
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeVectorTypes.cpp | 246 assert(N->getValueType(0).isVector() == 247 N->getOperand(0).getValueType().isVector() && 250 if (N->getValueType(0).isVector()) return ScalarizeVecRes_VSETCC(N); 274 assert(N->getValueType(0).isVector() && 275 N->getOperand(0).getValueType().isVector() && 742 assert(N->getValueType(0).isVector() && 743 N->getOperand(0).getValueType().isVector() && 1170 assert(N->getValueType(0).isVector() && 1171 N->getOperand(0).getValueType().isVector() && 1406 int NextSize = VT.isVector() [all...] |
H A D | DAGCombiner.cpp | 762 if (VT.isVector() || !VT.isInteger()) 820 if (VT.isVector() || !VT.isInteger()) 864 if (VT.isVector() || !VT.isInteger()) 893 if (VT.isVector() || !VT.isInteger()) 1323 if (VT.isVector()) { 1404 if (!VT.isVector() && SimplifyDemandedBits(SDValue(N, 0))) 1408 if (VT.isInteger() && !VT.isVector()) { 1547 if (!VT.isVector()) { 1570 if (VT.isVector()) { 1656 if (VT.isVector()) { [all...] |
H A D | SelectionDAG.cpp | 757 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 770 assert(N->getValueType(0).isVector() && "Wrong return type!"); 903 assert(!VT.isVector() && 945 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) == 961 if (!VT.isVector()) 971 if (VT.isVector()) { 1003 if (!VT.isVector()) 1013 if (VT.isVector()) { 1247 assert(VT.isVector() && N1.getValueType().isVector() [all...] |
H A D | LegalizeVectorOps.cpp | 131 HasVectorValue |= J->isVector(); 254 if (Op.getOperand(j).getValueType().isVector())
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64AsmPrinter.cpp | 95 const TargetRegisterClass *RC, bool isVector, 230 bool isVector, raw_ostream &O) { 237 RegToPrint, isVector ? AArch64::vreg : AArch64::NoRegAltName); 228 printAsmRegInClass(const MachineOperand &MO, const TargetRegisterClass *RC, bool isVector, raw_ostream &O) argument
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