Searched refs:lwc1 (Results 1 - 25 of 39) sorted by relevance

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/external/valgrind/none/tests/mips64/
H A Dchange_fp_mode.stdout.exp2 lwc1 $f0, 0($t0) :: lo32(f1): 5a5a, lo32(f0): 12345678
3 lwc1 $f1, 0($t0) :: lo32(f1): 12345678, lo32(f0): 5a5a
51 lwc1 $f0, 0($t0) :: lo32(f1): 5a5a, lo32(f0): 12345678
52 lwc1 $f1, 0($t0) :: lo32(f1): 12345678, lo32(f0): 5a5a
100 lwc1 $f0, 0($t0) :: lo32(f1): 5a5a, lo32(f0): 12345678
101 lwc1 $f1, 0($t0) :: lo32(f1): 12345678, lo32(f0): 5a5a
/external/llvm/test/MC/Mips/
H A Dnacl-mask.s48 lwc1 $f0, 0($6)
81 # CHECK-NEXT: lwc1 $f0, 0($6)
H A Dmicromips-fpu-instructions.s20 # CHECK-EL: lwc1 $f2, 4($6) # encoding: [0x46,0x9c,0x04,0x00]
85 # CHECK-EB: lwc1 $f2, 4($6) # encoding: [0x9c,0x46,0x00,0x04]
148 lwc1 $f2, 4($6)
/external/llvm/test/MC/Mips/micromips32r6/
H A Dinvalid.s268 lwc1 $f32, 32($5) # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
269 lwc1 $f2, -32769($5) # CHECK: :[[@LINE]]:13: error: expected memory with 16-bit signed offset
270 lwc1 $f2, 32768($5) # CHECK: :[[@LINE]]:13: error: expected memory with 16-bit signed offset
271 lwc1 $f2, 32($32) # CHECK: :[[@LINE]]:13: error: expected memory with 16-bit signed offset
H A Dvalid.s360 lwc1 $f2, 32($5) # CHECK: lwc1 $f2, 32($5) # encoding: [0x9c,0x45,0x00,0x20]
/external/llvm/test/MC/Mips/micromips64r6/
H A Dinvalid.s316 lwc1 $f32, 32($5) # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
317 lwc1 $f2, -32769($5) # CHECK: :[[@LINE]]:13: error: expected memory with 16-bit signed offset
318 lwc1 $f2, 32768($5) # CHECK: :[[@LINE]]:13: error: expected memory with 16-bit signed offset
319 lwc1 $f2, 32($32) # CHECK: :[[@LINE]]:13: error: expected memory with 16-bit signed offset
H A Dvalid.s313 lwc1 $f2, 32($5) # CHECK: lwc1 $f2, 32($5) # encoding: [0x9c,0x45,0x00,0x20]
/external/llvm/test/MC/Mips/mips1/
H A Dvalid.s57 lwc1 $f16,10225($k0)
172 lwc1 $f0, %lo(g_8)($2) # CHECK: encoding: [0xc4,0x40,A,A]
/external/llvm/test/MC/Mips/mips2/
H A Dvalid.s77 lwc1 $f16,10225($k0)
199 lwc1 $f0, %lo(g_8)($2) # CHECK: encoding: [0xc4,0x40,A,A]
/external/v8/src/crankshaft/mips/
H A Dlithium-gap-resolver-mips.cc214 __ lwc1(kLithiumScratchDouble, source_operand);
/external/libjpeg-turbo/simd/
H A Djsimd_mips_dspr2.S2845 lwc1 f2, 0(a2)
2846 lwc1 f10, 0(a1)
2847 lwc1 f4, 4(a2)
2848 lwc1 f12, 4(a1)
2849 lwc1 f6, 8(a2)
2850 lwc1 f14, 8(a1)
2851 lwc1 f8, 12(a2)
2852 lwc1 f16, 12(a1)
2857 lwc1 f10, 16(a1)
2858 lwc1 f1
[all...]
/external/llvm/test/MC/Mips/mips3/
H A Dvalid.s135 lwc1 $f16,10225($k0)
265 lwc1 $f0, %lo(g_8)($2) # CHECK: encoding: [0xc4,0x40,A,A]
/external/llvm/test/MC/Mips/mips32/
H A Dvalid.s85 lwc1 $f16,10225($k0)
229 lwc1 $f0, %lo(g_8)($2) # CHECK: encoding: [0xc4,0x40,A,A]
/external/llvm/test/MC/Mips/mips32r2/
H A Dvalid.s96 lwc1 $f16,10225($k0)
268 lwc1 $f0, %lo(g_8)($2) # CHECK: encoding: [0xc4,0x40,A,A]
/external/llvm/test/MC/Mips/mips32r3/
H A Dvalid.s96 lwc1 $f16,10225($k0)
268 lwc1 $f0, %lo(g_8)($2) # CHECK: encoding: [0xc4,0x40,A,A]
/external/llvm/test/MC/Mips/mips32r5/
H A Dvalid.s97 lwc1 $f16,10225($k0)
269 lwc1 $f0, %lo(g_8)($2) # CHECK: encoding: [0xc4,0x40,A,A]
/external/llvm/test/MC/Mips/mips4/
H A Dvalid.s140 lwc1 $f16,10225($k0)
294 lwc1 $f0, %lo(g_8)($2) # CHECK: encoding: [0xc4,0x40,A,A]
/external/llvm/test/MC/Mips/mips5/
H A Dvalid.s141 lwc1 $f16,10225($k0)
296 lwc1 $f0, %lo(g_8)($2) # CHECK: encoding: [0xc4,0x40,A,A]
/external/swiftshader/third_party/subzero/src/
H A DIceAssemblerMIPS32.h202 void lwc1(const Operand *OpRt, const Operand *OpBase, const Operand *OpOff,
/external/llvm/test/MC/Mips/mips64/
H A Dvalid.s148 lwc1 $f16,10225($k0)
315 lwc1 $f0, %lo(g_8)($2) # CHECK: encoding: [0xc4,0x40,A,A]
/external/llvm/test/MC/Mips/mips64r2/
H A Dvalid.s164 lwc1 $f16,10225($k0)
342 lwc1 $f0, %lo(g_8)($2) # CHECK: encoding: [0xc4,0x40,A,A]
/external/llvm/test/MC/Mips/mips64r3/
H A Dvalid.s164 lwc1 $f16,10225($k0)
342 lwc1 $f0, %lo(g_8)($2) # CHECK: encoding: [0xc4,0x40,A,A]
/external/llvm/test/MC/Mips/mips64r5/
H A Dvalid.s165 lwc1 $f16,10225($k0)
343 lwc1 $f0, %lo(g_8)($2) # CHECK: encoding: [0xc4,0x40,A,A]
/external/v8/src/compiler/mips/
H A Dcode-generator-mips.cc1447 __ lwc1(i.OutputSingleRegister(), i.MemoryOperand());
1545 ASSEMBLE_CHECKED_LOAD_FLOAT(Single, lwc1);
2240 __ lwc1(g.ToDoubleRegister(destination), src);
2251 __ lwc1(temp, src);
2314 __ lwc1(src, dst);
2338 __ lwc1(temp_1, dst0); // Save destination in temp_1.
/external/v8/src/mips/
H A Ddisasm-mips.cc1646 Format(instr, "lwc1 'ft, 'imm16s('rs)");

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