/external/llvm/test/MC/AArch64/ |
H A D | armv8.2a-mmfr2.s | 4 mrs x3, id_aa64mmfr2_el1 5 // CHECK: mrs x3, ID_AA64MMFR2_EL1 // encoding: [0x43,0x07,0x38,0xd5]
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H A D | gicv3-regs.s | 3 mrs x8, icc_iar1_el1 4 mrs x26, icc_iar0_el1 5 mrs x2, icc_hppir1_el1 6 mrs x17, icc_hppir0_el1 7 mrs x29, icc_rpr_el1 8 mrs x4, ich_vtr_el2 9 mrs x24, ich_eisr_el2 10 mrs x9, ich_elsr_el2 11 mrs x24, icc_bpr1_el1 12 mrs x1 [all...] |
H A D | armv8.2a-statistical-profiling.s | 48 mrs x0, pmblimitr_el1 label 49 mrs x0, pmbptr_el1 50 mrs x0, pmbsr_el1 51 mrs x0, pmbidr_el1 52 mrs x0, pmscr_el2 53 mrs x0, pmscr_el12 54 mrs x0, pmscr_el1 55 mrs x0, pmsicr_el1 56 mrs x0, pmsirr_el1 57 mrs x [all...] |
H A D | ras-extension.s | 29 mrs x0, errselr_el1 30 mrs x15, errselr_el1 31 mrs x25, errselr_el1 32 mrs x1, erxctlr_el1 33 mrs x2, erxstatus_el1 34 mrs x3, erxaddr_el1 35 mrs x4, erxmisc0_el1 36 mrs x5, erxmisc1_el1 37 mrs x6, disr_el1 38 mrs x [all...] |
H A D | trace-regs.s | 3 mrs x8, trcstatr 4 mrs x9, trcidr8 5 mrs x11, trcidr9 6 mrs x25, trcidr10 7 mrs x7, trcidr11 8 mrs x7, trcidr12 9 mrs x6, trcidr13 10 mrs x27, trcidr0 11 mrs x29, trcidr1 12 mrs x [all...] |
H A D | arm64-system-encoding.s | 221 mrs x3, ACTLR_EL1 222 mrs x3, ACTLR_EL2 223 mrs x3, ACTLR_EL3 224 mrs x3, AFSR0_EL1 225 mrs x3, AFSR0_EL2 226 mrs x3, AFSR0_EL3 227 mrs x3, AIDR_EL1 228 mrs x3, AFSR1_EL1 229 mrs x3, AFSR1_EL2 230 mrs x [all...] |
H A D | arm64-spsel-sysreg.s | 8 mrs x0, SPSel label 9 mrs x0, ESR_EL1 label 15 // CHECK: mrs x0, SPSel // encoding: [0x00,0x42,0x38,0xd5] 16 // CHECK: mrs x0, ESR_EL1 // encoding: [0x00,0x52,0x38,0xd5] 21 mrs x0, DAIFSet label
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H A D | gicv3-regs-diagnostics.s | 4 mrs x10, icc_eoir1_el1 5 mrs x7, icc_eoir0_el1 6 mrs x22, icc_dir_el1 7 mrs x24, icc_sgi1r_el1 8 mrs x8, icc_asgi1r_el1 9 mrs x28, icc_sgi0r_el1 11 // CHECK-NEXT: mrs x10, icc_eoir1_el1 14 // CHECK-NEXT: mrs x7, icc_eoir0_el1 17 // CHECK-NEXT: mrs x22, icc_dir_el1 20 // CHECK-NEXT: mrs x2 [all...] |
H A D | armv8.1a-pan.s | 12 mrs x13, pan 13 // CHECK: mrs x13, PAN // encoding: [0x6d,0x42,0x38,0xd5] 18 mrs w0, pan 29 // CHECK-ERROR: mrs w0, pan
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H A D | armv8.2a-uao.s | 15 mrs x2, uao 17 // CHECK: mrs x2, UAO // encoding: [0x82,0x42,0x38,0xd5]
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H A D | basic-a64-instructions.s | 4211 mrs x9, TEECR32_EL1 4212 mrs x9, OSDTRRX_EL1 4213 mrs x9, MDCCSR_EL0 4214 mrs x9, MDCCINT_EL1 4215 mrs x9, MDSCR_EL1 4216 mrs x9, OSDTRTX_EL1 4217 mrs x9, DBGDTR_EL0 4218 mrs x9, DBGDTRRX_EL0 4219 mrs x9, OSECCR_EL1 4220 mrs x [all...] |
H A D | armv8.1a-lor.s | 29 mrs x0, LORID_EL1 34 // CHECK: mrs x0, LORID_EL1 // encoding: [0xe0,0xa4,0x38,0xd5] 46 mrs LORID_EL1, #0 78 // CHECK-ERROR: mrs LORID_EL1, #0
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H A D | trace-regs-diagnostics.s | 3 mrs x12, trcoslar 4 mrs x10, trclar 6 // CHECK-NEXT: mrs x12, trcoslar 9 // CHECK-NEXT: mrs x10, trclar
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H A D | basic-a64-diagnostics.s | 3681 mrs x9, DBGDTRTX_EL0 3682 mrs x9, OSLAR_EL1 3683 mrs x9, PMSWINC_EL0 3684 mrs x9, PMEVCNTR31_EL0 3685 mrs x9, PMEVTYPER31_EL0 3687 // CHECK-ERROR-NEXT: mrs x9, DBGDTRTX_EL0 3690 // CHECK-ERROR-NEXT: mrs x9, OSLAR_EL1 3693 // CHECK-ERROR-NEXT: mrs x9, PMSWINC_EL0 3696 // CHECK-ERROR-NEXT: mrs x9, PMEVCNTR31_EL0 3699 // CHECK-ERROR-NEXT: mrs x [all...] |
/external/capstone/suite/MC/AArch64/ |
H A D | gicv3-regs.s.cs | 2 0x08,0xcc,0x38,0xd5 = mrs x8, icc_iar1_el1 3 0x1a,0xc8,0x38,0xd5 = mrs x26, icc_iar0_el1 4 0x42,0xcc,0x38,0xd5 = mrs x2, icc_hppir1_el1 5 0x51,0xc8,0x38,0xd5 = mrs x17, icc_hppir0_el1 6 0x7d,0xcb,0x38,0xd5 = mrs x29, icc_rpr_el1 7 0x24,0xcb,0x3c,0xd5 = mrs x4, ich_vtr_el2 8 0x78,0xcb,0x3c,0xd5 = mrs x24, ich_eisr_el2 9 0xa9,0xcb,0x3c,0xd5 = mrs x9, ich_elsr_el2 10 0x78,0xcc,0x38,0xd5 = mrs x24, icc_bpr1_el1 11 0x6e,0xc8,0x38,0xd5 = mrs x1 [all...] |
H A D | trace-regs.s.cs | 2 0x08,0x03,0x31,0xd5 = mrs x8, trcstatr 3 0xc9,0x00,0x31,0xd5 = mrs x9, trcidr8 4 0xcb,0x01,0x31,0xd5 = mrs x11, trcidr9 5 0xd9,0x02,0x31,0xd5 = mrs x25, trcidr10 6 0xc7,0x03,0x31,0xd5 = mrs x7, trcidr11 7 0xc7,0x04,0x31,0xd5 = mrs x7, trcidr12 8 0xc6,0x05,0x31,0xd5 = mrs x6, trcidr13 9 0xfb,0x08,0x31,0xd5 = mrs x27, trcidr0 10 0xfd,0x09,0x31,0xd5 = mrs x29, trcidr1 11 0xe4,0x0a,0x31,0xd5 = mrs x [all...] |
H A D | basic-a64-instructions.s.cs | 1706 0x69,0x42,0x38,0xd5 = mrs x9, pan 1707 0x89,0x42,0x38,0xd5 = mrs x9, uao 1708 0x09,0x00,0x32,0xd5 = mrs x9, teecr32_el1 1709 0x49,0x00,0x30,0xd5 = mrs x9, osdtrrx_el1 1710 0x09,0x01,0x33,0xd5 = mrs x9, mdccsr_el0 1711 0x09,0x02,0x30,0xd5 = mrs x9, mdccint_el1 1712 0x49,0x02,0x30,0xd5 = mrs x9, mdscr_el1 1713 0x49,0x03,0x30,0xd5 = mrs x9, osdtrtx_el1 1714 0x09,0x04,0x33,0xd5 = mrs x9, dbgdtr_el0 1715 0x09,0x05,0x33,0xd5 = mrs x [all...] |
/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
H A D | thumb2-mclass.s | 12 mrs r0, apsr
13 mrs r0, iapsr
14 mrs r0, eapsr
15 mrs r0, xpsr
16 mrs r0, ipsr
17 mrs r0, epsr
18 mrs r0, iepsr
19 mrs r0, msp
20 mrs r0, psp
21 mrs r [all...] |
/external/llvm/test/MC/ARM/ |
H A D | move-banked-regs.s | 4 mrs r2, r8_usr 5 mrs r3, r9_usr 6 mrs r5, r10_usr 7 mrs r7, r11_usr 8 mrs r11, r12_usr 9 mrs r1, sp_usr 10 mrs r2, lr_usr 11 @ CHECK-ARM: mrs r2, r8_usr @ encoding: [0x00,0x22,0x00,0xe1] 12 @ CHECK-ARM: mrs r3, r9_usr @ encoding: [0x00,0x32,0x01,0xe1] 13 @ CHECK-ARM: mrs r [all...] |
H A D | thumbv7m.s | 13 mrs r0, basepri 14 mrs r0, basepri_max 15 mrs r0, faultmask 17 @ CHECK: mrs r0, basepri @ encoding: [0xef,0xf3,0x11,0x80] 18 @ CHECK: mrs r0, basepri_max @ encoding: [0xef,0xf3,0x12,0x80] 19 @ CHECK: mrs r0, faultmask @ encoding: [0xef,0xf3,0x13,0x80] 34 @ CHECK-V6M-NEXT: mrs r0, basepri 36 @ CHECK-V6M-NEXT: mrs r0, basepri_max 38 @ CHECK-V6M-NEXT: mrs r0, faultmask
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H A D | thumb2-mclass.s | 13 mrs r0, apsr 14 mrs r0, iapsr 15 mrs r0, eapsr 16 mrs r0, xpsr 17 mrs r0, ipsr 18 mrs r0, epsr 19 mrs r0, iepsr 20 mrs r0, msp 21 mrs r0, psp 22 mrs r [all...] |
/external/compiler-rt/test/builtins/Unit/arm/ |
H A D | call_apsr.S | 28 mrs r0, apsr 41 mrs r0, apsr
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/external/capstone/suite/MC/ARM/ |
H A D | thumb2-mclass.s.cs | 2 0xef,0xf3,0x00,0x80 = mrs r0, apsr 3 0xef,0xf3,0x01,0x80 = mrs r0, iapsr 4 0xef,0xf3,0x02,0x80 = mrs r0, eapsr 5 0xef,0xf3,0x03,0x80 = mrs r0, xpsr 6 0xef,0xf3,0x05,0x80 = mrs r0, ipsr 7 0xef,0xf3,0x06,0x80 = mrs r0, epsr 8 0xef,0xf3,0x07,0x80 = mrs r0, iepsr 9 0xef,0xf3,0x08,0x80 = mrs r0, msp 10 0xef,0xf3,0x09,0x80 = mrs r0, psp 11 0xef,0xf3,0x10,0x80 = mrs r [all...] |
/external/google-breakpad/src/common/android/ |
H A D | breakpad_getcontext.S | 150 mrs x4, fpsr 153 mrs x4, fpcr
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/external/valgrind/none/tests/arm64/ |
H A D | integer.stdout.exp | 154 cmp x4, x5 ; mrs x3, nzcv :: rd 0000000020000000 rm db432311d1e3a1d0, rn a6325ae016fbd710, cin 0, nzcv 20000000 C 155 cmp x4, x5 ; mrs x3, nzcv :: rd 0000000000000000 rm 192e7217e1ab63b0, rn fd370f11bfcd4a4a, cin 0, nzcv 00000000 156 cmp x4, x5 ; mrs x3, nzcv :: rd 00000000a0000000 rm fd79baaee550b488, rn 5bc94f0d3ee4863a, cin 0, nzcv a0000000 N C 157 cmp x4, x5 ; mrs x3, nzcv :: rd 0000000080000000 rm c58586ea2c6954df, rn e861540945421773, cin 0, nzcv 80000000 N 158 cmp x4, x5 ; mrs x3, nzcv :: rd 00000000a0000000 rm e51579fec3892795, rn 507865169b052546, cin 0, nzcv a0000000 N C 159 cmp x4, x5 ; mrs x3, nzcv :: rd 0000000090000000 rm 1b834ed5b21de6b5, rn 9a1140d0fd1dbf6c, cin 0, nzcv 90000000 N V 160 cmp x4, x5 ; mrs x3, nzcv :: rd 0000000000000000 rm 2b7c5939d7c0f528, rn b73870a5a6630162, cin 0, nzcv 00000000 161 cmp x4, x5 ; mrs x3, nzcv :: rd 00000000a0000000 rm fc9a9d8be2434f5e, rn 6a13f7db3dfa4a3f, cin 0, nzcv a0000000 N C 162 cmp x4, x5 ; mrs x3, nzcv :: rd 0000000020000000 rm d98d2022a9b876ab, rn a7e754e8ff3a554e, cin 0, nzcv 20000000 C 163 cmp x4, x5 ; mrs x [all...] |